97e629c8bd
Document bindings for R-Car V4M (R8A779H0) PCIe host module. Link: https://lore.kernel.org/linux-pci/20240822064459.1133748-2-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
131 lines
3.4 KiB
YAML
131 lines
3.4 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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# Copyright (C) 2022-2023 Renesas Electronics Corp.
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pci/rcar-gen4-pci-host.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Renesas R-Car Gen4 PCIe Host
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maintainers:
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- Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
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allOf:
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- $ref: snps,dw-pcie.yaml#
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properties:
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compatible:
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items:
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- enum:
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- renesas,r8a779f0-pcie # R-Car S4-8
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- renesas,r8a779g0-pcie # R-Car V4H
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- renesas,r8a779h0-pcie # R-Car V4M
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- const: renesas,rcar-gen4-pcie # R-Car Gen4
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reg:
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maxItems: 7
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reg-names:
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items:
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- const: dbi
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- const: dbi2
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- const: atu
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- const: dma
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- const: app
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- const: phy
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- const: config
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interrupts:
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maxItems: 4
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interrupt-names:
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items:
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- const: msi
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- const: dma
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- const: sft_ce
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- const: app
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clocks:
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maxItems: 2
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clock-names:
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items:
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- const: core
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- const: ref
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power-domains:
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maxItems: 1
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resets:
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maxItems: 1
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reset-names:
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items:
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- const: pwr
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max-link-speed:
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maximum: 4
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num-lanes:
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maximum: 4
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required:
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- compatible
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- reg
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- reg-names
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- interrupts
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- interrupt-names
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- clocks
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- clock-names
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- power-domains
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- resets
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- reset-names
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/r8a779f0-cpg-mssr.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/power/r8a779f0-sysc.h>
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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pcie: pcie@e65d0000 {
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compatible = "renesas,r8a779f0-pcie", "renesas,rcar-gen4-pcie";
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reg = <0 0xe65d0000 0 0x1000>, <0 0xe65d2000 0 0x0800>,
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<0 0xe65d3000 0 0x2000>, <0 0xe65d5000 0 0x1200>,
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<0 0xe65d6200 0 0x0e00>, <0 0xe65d7000 0 0x0400>,
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<0 0xfe000000 0 0x400000>;
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reg-names = "dbi", "dbi2", "atu", "dma", "app", "phy", "config";
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interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "msi", "dma", "sft_ce", "app";
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clocks = <&cpg CPG_MOD 624>, <&pcie0_clkref>;
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clock-names = "core", "ref";
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power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
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resets = <&cpg 624>;
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reset-names = "pwr";
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max-link-speed = <4>;
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num-lanes = <2>;
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#address-cells = <3>;
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#size-cells = <2>;
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bus-range = <0x00 0xff>;
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device_type = "pci";
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ranges = <0x01000000 0 0x00000000 0 0xfe000000 0 0x00400000>,
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<0x02000000 0 0x30000000 0 0x30000000 0 0x10000000>;
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dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 7>;
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interrupt-map = <0 0 0 1 &gic GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
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<0 0 0 2 &gic GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
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<0 0 0 3 &gic GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
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<0 0 0 4 &gic GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>;
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snps,enable-cdm-check;
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};
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};
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