ce43b4b20e
Add device tree binding documentation for the Aspeed ECDSA/RSA ACRY Engines Controller. Signed-off-by: Neal Liu <neal_liu@aspeedtech.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
50 lines
1.1 KiB
YAML
50 lines
1.1 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/crypto/aspeed,ast2600-acry.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: ASPEED ACRY ECDSA/RSA Hardware Accelerator Engines
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maintainers:
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- Neal Liu <neal_liu@aspeedtech.com>
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description:
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The ACRY ECDSA/RSA engines is designed to accelerate the throughput
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of ECDSA/RSA signature and verification. Basically, ACRY can be
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divided into two independent engines - ECC Engine and RSA Engine.
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properties:
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compatible:
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enum:
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- aspeed,ast2600-acry
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reg:
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items:
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- description: acry base address & size
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- description: acry sram base address & size
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clocks:
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maxItems: 1
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interrupts:
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maxItems: 1
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required:
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- compatible
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- reg
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- clocks
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- interrupts
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/ast2600-clock.h>
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acry: crypto@1e6fa000 {
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compatible = "aspeed,ast2600-acry";
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reg = <0x1e6fa000 0x400>, <0x1e710000 0x1800>;
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interrupts = <160>;
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clocks = <&syscon ASPEED_CLK_GATE_RSACLK>;
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};
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