94274f20f6
Convert the OPP v1 and v2 bindings to DT schema format. As the OPPv2 binding can be extended by vendors, we need to split the common part out from the "operating-points-v2" conforming compatible. Cc: Yangtao Li <tiny.windzz@gmail.com> Cc: Nishanth Menon <nm@ti.com> Cc: Stephen Boyd <sboyd@kernel.org> Cc: Maxime Ripard <mripard@kernel.org> Cc: Chen-Yu Tsai <wens@csie.org> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Maxime Ripard <maxime@cerno.tech> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
62 lines
1.4 KiB
Plaintext
62 lines
1.4 KiB
Plaintext
Generic cpufreq driver
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It is a generic DT based cpufreq driver for frequency management. It supports
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both uniprocessor (UP) and symmetric multiprocessor (SMP) systems which share
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clock and voltage across all CPUs.
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Both required and optional properties listed below must be defined
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under node /cpus/cpu@0.
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Required properties:
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- None
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Optional properties:
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- operating-points: Refer to Documentation/devicetree/bindings/opp/opp-v1.yaml for
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details. OPPs *must* be supplied either via DT, i.e. this property, or
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populated at runtime.
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- clock-latency: Specify the possible maximum transition latency for clock,
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in unit of nanoseconds.
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- voltage-tolerance: Specify the CPU voltage tolerance in percentage.
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- #cooling-cells:
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Please refer to
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Documentation/devicetree/bindings/thermal/thermal-cooling-devices.yaml.
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Examples:
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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compatible = "arm,cortex-a9";
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reg = <0>;
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next-level-cache = <&L2>;
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operating-points = <
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/* kHz uV */
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792000 1100000
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396000 950000
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198000 850000
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>;
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clock-latency = <61036>; /* two CLK32 periods */
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#cooling-cells = <2>;
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};
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cpu@1 {
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compatible = "arm,cortex-a9";
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reg = <1>;
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next-level-cache = <&L2>;
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};
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cpu@2 {
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compatible = "arm,cortex-a9";
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reg = <2>;
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next-level-cache = <&L2>;
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};
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cpu@3 {
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compatible = "arm,cortex-a9";
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reg = <3>;
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next-level-cache = <&L2>;
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};
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};
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