5a7144d61d
Add bindings for the gate clocks of RP subsystem for Sophgo SG2042. Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Reviewed-by: Rob Herring <robh@kernel.org>
50 lines
974 B
YAML
50 lines
974 B
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/sophgo,sg2042-rpgate.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Sophgo SG2042 Gate Clock Generator for RP(riscv processors) subsystem
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maintainers:
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- Chen Wang <unicorn_wang@outlook.com>
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properties:
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compatible:
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const: sophgo,sg2042-rpgate
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reg:
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maxItems: 1
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clocks:
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items:
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- description: Gate clock for RP subsystem
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clock-names:
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items:
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- const: rpgate
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'#clock-cells':
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const: 1
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description:
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See <dt-bindings/clock/sophgo,sg2042-rpgate.h> for valid indices.
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required:
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- compatible
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- reg
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- clocks
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- clock-names
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- '#clock-cells'
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additionalProperties: false
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examples:
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- |
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clock-controller@20000000 {
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compatible = "sophgo,sg2042-rpgate";
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reg = <0x20000000 0x10000>;
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clocks = <&clkgen 85>;
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clock-names = "rpgate";
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#clock-cells = <1>;
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};
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