84e85359f4
The Devicetree bindings document does not have to say in the title that
it is a "binding", but instead just describe the hardware.
Drop trailing "bindings" in various forms (also with trailing full
stop):
find Documentation/devicetree/bindings/ -type f -name '*.yaml' \
-not -name 'trivial-devices.yaml' \
-exec sed -i -e 's/^title: \(.*\) [bB]indings\?\.\?$/title: \1/' {} \;
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Acked-by: Matti Vaittinen <mazziesaccount@gmail.com> # ROHM
Acked-by: Ulf Hansson <ulf.hansson@linaro.org> # MMC
Acked-by: Stephen Boyd <sboyd@kernel.org> # clk
Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> # input
Acked-by: Mark Brown <broonie@kernel.org>
Acked-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> # media
Acked-by: Sebastian Reichel <sre@kernel.org> # power
Acked-by: Viresh Kumar <viresh.kumar@linaro.org> # cpufreq
Link: https://lore.kernel.org/r/20221216163815.522628-7-krzysztof.kozlowski@linaro.org
Signed-off-by: Rob Herring <robh@kernel.org>
74 lines
1.8 KiB
YAML
74 lines
1.8 KiB
YAML
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
|
%YAML 1.2
|
|
---
|
|
$id: http://devicetree.org/schemas/clock/rockchip,rk3568-cru.yaml#
|
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
|
|
|
title: ROCKCHIP rk3568 Family Clock Control Module
|
|
|
|
maintainers:
|
|
- Elaine Zhang <zhangqing@rock-chips.com>
|
|
- Heiko Stuebner <heiko@sntech.de>
|
|
|
|
description: |
|
|
The RK3568 clock controller generates the clock and also implements a
|
|
reset controller for SoC peripherals.
|
|
(examples: provide SCLK_UART1\PCLK_UART1 and SRST_P_UART1\SRST_S_UART1 for UART module)
|
|
Each clock is assigned an identifier and client nodes can use this identifier
|
|
to specify the clock which they consume. All available clocks are defined as
|
|
preprocessor macros in the dt-bindings/clock/rk3568-cru.h headers and can be
|
|
used in device tree sources.
|
|
|
|
properties:
|
|
compatible:
|
|
enum:
|
|
- rockchip,rk3568-cru
|
|
- rockchip,rk3568-pmucru
|
|
|
|
reg:
|
|
maxItems: 1
|
|
|
|
"#clock-cells":
|
|
const: 1
|
|
|
|
"#reset-cells":
|
|
const: 1
|
|
|
|
clocks:
|
|
maxItems: 1
|
|
|
|
clock-names:
|
|
const: xin24m
|
|
|
|
rockchip,grf:
|
|
$ref: /schemas/types.yaml#/definitions/phandle
|
|
description:
|
|
Phandle to the syscon managing the "general register files" (GRF),
|
|
if missing pll rates are not changeable, due to the missing pll
|
|
lock status.
|
|
|
|
required:
|
|
- compatible
|
|
- reg
|
|
- "#clock-cells"
|
|
- "#reset-cells"
|
|
|
|
additionalProperties: false
|
|
|
|
examples:
|
|
# Clock Control Module node:
|
|
- |
|
|
pmucru: clock-controller@fdd00000 {
|
|
compatible = "rockchip,rk3568-pmucru";
|
|
reg = <0xfdd00000 0x1000>;
|
|
#clock-cells = <1>;
|
|
#reset-cells = <1>;
|
|
};
|
|
- |
|
|
cru: clock-controller@fdd20000 {
|
|
compatible = "rockchip,rk3568-cru";
|
|
reg = <0xfdd20000 0x1000>;
|
|
#clock-cells = <1>;
|
|
#reset-cells = <1>;
|
|
};
|