4f6dc10b7e
This introduces support for the following devices: - Lenovo Thinkpad T14s Gen 6 - Microsoft Surface Laptop 7 laptop - Lenovo A6000 - Lenovo A6010 - Samsung Galaxy J3, - Lenovo Vibe K5 (multiple variants) - LG G4 IPQ5332 global clock controller is marked as an interconnect-provider, and the USB interrupt triggers are corrected. Touchscreen description is added to the Samsung Galaxy Core Prime and Max, and touch keys are added to the Samsung Galaxy Grand Prime and Galaxy Tab A. Camera flash is added to BQ Aquaris M5 and X5. The SD-card slot is described for the QCM6490 IDP. For SA8775P CPU and LLCC bwmon is added, audio, compute and general purpose DSP remoteprocs are added, with FastRPC on audio and compute DSP. CPUidle states, capacity and DPC properties are added. On SC8180X definitions for the multiport USB controller is introduced, and enabled on the Lenovo Flex 5G to bring the camera to life. Power key definitions are added as well. The RGB camera sensor on the Lenovo ThinkPad X13s is described. PCIe pinconf properties are cleaned up on this and the CRD. The four USB Type-A ports found on the SA8295P ADP are enabled. The modem subsystem remoteproc is introduced on the SDX75 and enabled on the IDP device. Camera, display and GPU clock controllers are added for the SM4450 platform. On the F(x)tec Pro1X device, display, GPU, WiFi, RGB LED, SD-card, remoteprocs, USB3 SuperSpeed, touchscreen, IO-expander, hall switch, caps lock LED and camera button are introduced. The camera clock controller is added to SM8150, and the GPU-only "amd,imageon" compatible is dropped from the MTP device. Refgen regulator for the DSI nodes of SM8350 is described, and the display subsystem interconnect paths are corrected. The camera control interface controllers are described on both SM8550 and SM8650. The bluetooth node on on SM8550 QRD, SM8650 QRD and SM8650 HDK are transitioned to the power sequence description. WiFi is added to the SM8550 hardware development kit (HDK). On the X1 Elite platform, one more UART, a DisplayPort PHY, the USB multiport controller, a PCIe controller and PHY are added. Orientation switching is wired up for the USB+DP PHYs. RPMh statistics node is added. For the X1 Elite CRD the LID switch and the SDX65 modems are introduced. -----BEGIN PGP SIGNATURE----- iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmbYwlQVHGFuZGVyc3Nv bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3Fd2UP/2fq0EEi34Yd3GUpQ+6U6v9MPpT3 AhRzvFDGsRJX/wiDw2N5RqowPHfxK8jzYGF5wwLXaZyQfaM8Be6OIQfg/zl9+yYn 6FqtqM6hK0RjSLac0iYp9Gf0iuKa/MfyAVoigG6oWqGyRWY9FiFwgMWEqUhwAeft oDVFIRJT6wxM1EpzEq67rXfqfZ3ySpblQIsQtkwsw92osx1kHO9R/T2rzgYxfrsF 6ZN99qgBOJ5DQmRuOHMDLy+cBuNaiB4S3iuXnboJkJFu9SmogZt5o/EP6hZViYAJ TC1FRBXsAsa+jrhgFTt2ZHCHcbX0+PfJPtW7FFznNT22GKoXGY5vRXhUaY0Sq7jN P6DwsoB38OKZD+DJe6DPIP2dgbDRJTx0VTYqIa4ynJuXdCtzpSpbdwYNWVH2gHqo q7jItUBDs6/cxqX7p8ArkdTPDaY7I5xibENTb59gsBErjw/z6CWXJEsDBEjsR3bp iJZ6bpDLV9w0zndDbA2u5VMph/HsLpK4w0BWOXC4nCqXq3duF+X3sc24eDRVEdt5 NNnUgXh5yURNdgvlhGPB0tnxwxKsJOWNIjqqfm9aeXl/CoyP1ZmCMHHkUZ5fcMVs ghiGy/hI2tRi0Hcy+vh3/8G5746nXTAJxKegCbseMG/bHS8mKtKSSld3zMch2Ogi 3Rwdau8zpJ1IjFYf =dcCx -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmbZhwMACgkQYKtH/8kJ UidKJw//UXXf/ap+0e8dY2++AW8fj1ir8CoZTMT9zuqO9HYtF/CRAv/Iw+rIGy/l JSDyW2JgF+6nbn5hUJGvBeNMIyHKit3WjAAsBEmTqqya5Lo+fDCS4ZHvqoXdgWIF 1OLfQ0JqTcQsmSHqkhqbBgM+YONz6kfUOWatqfCq0PnBmKGAArxGmcFrJHlt9b5+ D1rf0GIgmBD2nCZVfSo5gzab0BlrqYQs0gAGHWz5mg8WPb2fuqlooxBqN/UDUZYM 4UGrgrGTYhj/wLiM9cWtASGuchFLohq7dbBiHYjcwH3KTKI83fPTHF6+iiRZLr57 9eptLpXZbFlFZY+Bou/2wRPvAAGXkdNRrt1wHP6XmZQonRIELZUaw+umKJww3B+w 8JEXYizgsPmQQQu2mtZjYmXoc8GpN8N7l+Ngt4H+ZtSetsDnUX02TnWF7zdY2QUr MGpWwqWkIrnTavbgPL8/rcB0S20++VYoDfwjsnY73PB/HH95VT91fG+uf02Ll+8K VAbJf+ebpYOW9n1SsT9C6CMJiWYjEIb+LumwCYWl3PZiv8URdEWCudqop36OVjUx lTu0829gy0A4iKdQNrEMGEB3+/Yy0wAg7DzkyeVdjKh8iDUOVevJtb1I9PaccNzt nhwrHfvwjzKKriKS+CRosaa0GKNVa4GSfPiLnMKhZ99LVvZLvrc= =zjLL -----END PGP SIGNATURE----- Merge tag 'qcom-arm64-for-6.12' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt Qualcomm Arm64 DeviceTree updates for v6.12 This introduces support for the following devices: - Lenovo Thinkpad T14s Gen 6 - Microsoft Surface Laptop 7 laptop - Lenovo A6000 - Lenovo A6010 - Samsung Galaxy J3, - Lenovo Vibe K5 (multiple variants) - LG G4 IPQ5332 global clock controller is marked as an interconnect-provider, and the USB interrupt triggers are corrected. Touchscreen description is added to the Samsung Galaxy Core Prime and Max, and touch keys are added to the Samsung Galaxy Grand Prime and Galaxy Tab A. Camera flash is added to BQ Aquaris M5 and X5. The SD-card slot is described for the QCM6490 IDP. For SA8775P CPU and LLCC bwmon is added, audio, compute and general purpose DSP remoteprocs are added, with FastRPC on audio and compute DSP. CPUidle states, capacity and DPC properties are added. On SC8180X definitions for the multiport USB controller is introduced, and enabled on the Lenovo Flex 5G to bring the camera to life. Power key definitions are added as well. The RGB camera sensor on the Lenovo ThinkPad X13s is described. PCIe pinconf properties are cleaned up on this and the CRD. The four USB Type-A ports found on the SA8295P ADP are enabled. The modem subsystem remoteproc is introduced on the SDX75 and enabled on the IDP device. Camera, display and GPU clock controllers are added for the SM4450 platform. On the F(x)tec Pro1X device, display, GPU, WiFi, RGB LED, SD-card, remoteprocs, USB3 SuperSpeed, touchscreen, IO-expander, hall switch, caps lock LED and camera button are introduced. The camera clock controller is added to SM8150, and the GPU-only "amd,imageon" compatible is dropped from the MTP device. Refgen regulator for the DSI nodes of SM8350 is described, and the display subsystem interconnect paths are corrected. The camera control interface controllers are described on both SM8550 and SM8650. The bluetooth node on on SM8550 QRD, SM8650 QRD and SM8650 HDK are transitioned to the power sequence description. WiFi is added to the SM8550 hardware development kit (HDK). On the X1 Elite platform, one more UART, a DisplayPort PHY, the USB multiport controller, a PCIe controller and PHY are added. Orientation switching is wired up for the USB+DP PHYs. RPMh statistics node is added. For the X1 Elite CRD the LID switch and the SDX65 modems are introduced. * tag 'qcom-arm64-for-6.12' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (120 commits) arm64: dts: qcom: x1e80100: Fix PHY for DP2 arm64: dts: qcom: qcm6490-idp: Add SD Card node arm64: dts: qcom: x1e80100: Add orientation-switch to all USB+DP QMP PHYs arm64: dts: qcom: Add X1E78100 ThinkPad T14s Gen 6 dt-bindings: arm: qcom: Add Lenovo ThinkPad T14s Gen 6 Revert "arm64: dts: qcom: msm8939-longcheer-l9100: Add rear flash" arm64: dts: qcom: Add support for X1-based Surface Laptop 7 devices arm64: dts: qcom: x1e80100: Add UART2 arm64: dts: qcom: x1e80100-pmics: Add PMC8380C PWM dt-bindings: arm: qcom: Add Surface Laptop 7 devices arm64: dts: qcom: sm8150-mtp: drop incorrect amd,imageon arm64: qcom: sa8775p: Add ADSP and CDSP0 fastrpc nodes arm64: dts: qcom: x1e80100: Add USB Multiport controller arm64: dts: qcom: sa8775p: fix the fastrpc label arm64: dts: qcom: ipq5332: Add icc provider ability to gcc dt-bindings: interconnect: Add Qualcomm IPQ5332 support arm64: dts: qcom: sm8250: move lpass codec macros to use clks directly arm64: dts: qcom: msm8998: Add disabled support for LPASS iommu for Q6 dt-bindings: clock: gcc-msm8998: Add Q6 and LPASS clocks definitions arm64: dts: qcom: msm8976: Add restart node ... Link: https://lore.kernel.org/r/20240904215752.24465-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
70 lines
1.7 KiB
YAML
70 lines
1.7 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
|
%YAML 1.2
|
|
---
|
|
$id: http://devicetree.org/schemas/clock/qcom,sm8450-gpucc.yaml#
|
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
|
|
|
title: Qualcomm Graphics Clock & Reset Controller on SM8450
|
|
|
|
maintainers:
|
|
- Konrad Dybcio <konradybcio@kernel.org>
|
|
|
|
description: |
|
|
Qualcomm graphics clock control module provides the clocks, resets and power
|
|
domains on Qualcomm SoCs.
|
|
|
|
See also::
|
|
include/dt-bindings/clock/qcom,sm4450-gpucc.h
|
|
include/dt-bindings/clock/qcom,sm8450-gpucc.h
|
|
include/dt-bindings/clock/qcom,sm8550-gpucc.h
|
|
include/dt-bindings/reset/qcom,sm8450-gpucc.h
|
|
include/dt-bindings/reset/qcom,sm8650-gpucc.h
|
|
include/dt-bindings/reset/qcom,x1e80100-gpucc.h
|
|
|
|
properties:
|
|
compatible:
|
|
enum:
|
|
- qcom,sm4450-gpucc
|
|
- qcom,sm8450-gpucc
|
|
- qcom,sm8550-gpucc
|
|
- qcom,sm8650-gpucc
|
|
- qcom,x1e80100-gpucc
|
|
|
|
clocks:
|
|
items:
|
|
- description: Board XO source
|
|
- description: GPLL0 main branch source
|
|
- description: GPLL0 div branch source
|
|
|
|
required:
|
|
- compatible
|
|
- clocks
|
|
- '#power-domain-cells'
|
|
|
|
allOf:
|
|
- $ref: qcom,gcc.yaml#
|
|
|
|
unevaluatedProperties: false
|
|
|
|
examples:
|
|
- |
|
|
#include <dt-bindings/clock/qcom,gcc-sm8450.h>
|
|
#include <dt-bindings/clock/qcom,rpmh.h>
|
|
|
|
soc {
|
|
#address-cells = <2>;
|
|
#size-cells = <2>;
|
|
|
|
clock-controller@3d90000 {
|
|
compatible = "qcom,sm8450-gpucc";
|
|
reg = <0 0x03d90000 0 0xa000>;
|
|
clocks = <&rpmhcc RPMH_CXO_CLK>,
|
|
<&gcc GCC_GPU_GPLL0_CLK_SRC>,
|
|
<&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>;
|
|
#clock-cells = <1>;
|
|
#reset-cells = <1>;
|
|
#power-domain-cells = <1>;
|
|
};
|
|
};
|
|
...
|