b0ef3434da
On some of Qualcomm platforms the Global Clock Controller (GCC) doesn't provide power domains. Move requirement for the '#power-domain-cells' out of the common qcom,gcc.yaml into individual schema files. For the platforms that do not provide power-domains, explicitly forbid having the '#power-domain-cells' property. Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240529-qcom-gdscs-v2-2-69c63d0ae1e7@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
64 lines
1.5 KiB
YAML
64 lines
1.5 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/qcom,gcc-msm8909.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Global Clock & Reset Controller on MSM8909, MSM8917 and QM215
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maintainers:
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- Stephan Gerhold <stephan@gerhold.net>
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description: |
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Qualcomm global clock control module provides the clocks, resets and power
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domains on MSM8909, MSM8917 or QM215.
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See also::
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include/dt-bindings/clock/qcom,gcc-msm8909.h
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include/dt-bindings/clock/qcom,gcc-msm8917.h
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properties:
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compatible:
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enum:
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- qcom,gcc-msm8909
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- qcom,gcc-msm8917
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- qcom,gcc-qm215
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clocks:
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items:
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- description: XO source
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- description: Sleep clock source
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- description: DSI phy instance 0 dsi clock
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- description: DSI phy instance 0 byte clock
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clock-names:
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items:
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- const: xo
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- const: sleep_clk
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- const: dsi0pll
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- const: dsi0pllbyte
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required:
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- compatible
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- clocks
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- clock-names
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- '#power-domain-cells'
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allOf:
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- $ref: qcom,gcc.yaml#
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unevaluatedProperties: false
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examples:
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- |
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gcc: clock-controller@1800000 {
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compatible = "qcom,gcc-msm8909";
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reg = <0x01800000 0x80000>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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#power-domain-cells = <1>;
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clocks = <&xo_board>, <&sleep_clk>, <&dsi0_phy 1>, <&dsi0_phy 0>;
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clock-names = "xo", "sleep_clk", "dsi0pll", "dsi0pllbyte";
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};
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...
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