e81e9a845b
Add schema for the Global Clock Controller (GCC) present on the Qualcomm MDM9615 platform. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240529-qcom-gdscs-v2-3-69c63d0ae1e7@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
51 lines
986 B
YAML
51 lines
986 B
YAML
# SPDX-License-Identifier: GPL-2.0-only
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/qcom,gcc-mdm9615.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Global Clock & Reset Controller
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maintainers:
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- Stephen Boyd <sboyd@kernel.org>
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- Taniya Das <quic_tdas@quicinc.com>
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description: |
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Qualcomm global clock control module provides the clocks, resets and power
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domains.
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See also::
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include/dt-bindings/clock/qcom,gcc-mdm9615.h
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allOf:
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- $ref: qcom,gcc.yaml#
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properties:
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compatible:
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enum:
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- qcom,gcc-mdm9615
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clocks:
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items:
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- description: CXO clock
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- description: PLL4 from LLC
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'#power-domain-cells': false
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required:
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- compatible
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unevaluatedProperties: false
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examples:
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- |
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clock-controller@900000 {
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compatible = "qcom,gcc-mdm9615";
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reg = <0x900000 0x4000>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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clocks = <&cxo_board>,
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<&lcc_pll4>;
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};
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...
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