cc9d138fff
Just like most of Qualcomm clock controllers, we can reference common qcom,gcc.yaml schema to unify the common parts of the binding. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240605-dt-bindings-qcom-gcc-v2-3-f947b24f1283@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
86 lines
2.4 KiB
YAML
86 lines
2.4 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/qcom,dispcc-sc8280xp.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Display Clock & Reset Controller on SC8280XP
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maintainers:
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- Bjorn Andersson <bjorn.andersson@linaro.org>
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description: |
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Qualcomm display clock control module which supports the clocks, resets and
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power domains for the two MDSS instances on SC8280XP.
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See also:
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include/dt-bindings/clock/qcom,dispcc-sc8280xp.h
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properties:
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compatible:
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enum:
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- qcom,sc8280xp-dispcc0
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- qcom,sc8280xp-dispcc1
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clocks:
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items:
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- description: AHB interface clock,
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- description: SoC CXO clock
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- description: SoC sleep clock
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- description: DisplayPort 0 link clock
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- description: DisplayPort 0 VCO div clock
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- description: DisplayPort 1 link clock
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- description: DisplayPort 1 VCO div clock
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- description: DisplayPort 2 link clock
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- description: DisplayPort 2 VCO div clock
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- description: DisplayPort 3 link clock
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- description: DisplayPort 3 VCO div clock
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- description: DSI 0 PLL byte clock
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- description: DSI 0 PLL DSI clock
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- description: DSI 1 PLL byte clock
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- description: DSI 1 PLL DSI clock
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power-domains:
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items:
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- description: MMCX power domain
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required:
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- compatible
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- clocks
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- '#power-domain-cells'
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allOf:
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- $ref: qcom,gcc.yaml#
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/qcom,gcc-sc8280xp.h>
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#include <dt-bindings/clock/qcom,rpmh.h>
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#include <dt-bindings/power/qcom-rpmpd.h>
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clock-controller@af00000 {
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compatible = "qcom,sc8280xp-dispcc0";
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reg = <0x0af00000 0x20000>;
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clocks = <&gcc GCC_DISP_AHB_CLK>,
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<&rpmhcc RPMH_CXO_CLK>,
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<&sleep_clk>,
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<&mdss0_dp_phy0 0>,
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<&mdss0_dp_phy0 1>,
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<&mdss0_dp_phy1 0>,
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<&mdss0_dp_phy1 1>,
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<&mdss0_dp_phy2 0>,
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<&mdss0_dp_phy2 1>,
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<&mdss0_dp_phy3 0>,
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<&mdss0_dp_phy3 1>,
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<&mdss0_dsi0_phy 0>,
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<&mdss0_dsi0_phy 1>,
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<&mdss0_dsi1_phy 0>,
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<&mdss0_dsi1_phy 1>;
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power-domains = <&rpmhpd SC8280XP_MMCX>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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#power-domain-cells = <1>;
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};
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...
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