ab08aefcd1
It adds the DT support for pxa168 clock subsystem. Signed-off-by: Chao Xie <chao.xie@marvell.com> Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com> Signed-off-by: Michael Turquette <mturquette@linaro.org>
22 lines
735 B
Plaintext
22 lines
735 B
Plaintext
* Marvell PXA168 Clock Controller
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The PXA168 clock subsystem generates and supplies clock to various
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controllers within the PXA168 SoC.
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Required Properties:
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- compatible: should be one of the following.
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- "marvell,pxa168-clock" - controller compatible with PXA168 SoC.
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- reg: physical base address of the clock subsystem and length of memory mapped
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region. There are 3 places in SOC has clock control logic:
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"mpmu", "apmu", "apbc". So three reg spaces need to be defined.
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- #clock-cells: should be 1.
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- #reset-cells: should be 1.
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Each clock is assigned an identifier and client nodes use this identifier
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to specify the clock which they consume.
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All these identifier could be found in <dt-bindings/clock/marvell,pxa168.h>.
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