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linux/Documentation/devicetree/bindings/clock/imx6ul-clock.yaml
Krzysztof Kozlowski 499f5e3c7c dt-bindings: drop stale Anson Huang from maintainers
Emails to Anson Huang bounce:

  Diagnostic-Code: smtp; 550 5.4.1 Recipient address rejected: Access denied.

Add IMX platform maintainers for bindings which would become orphaned.

Acked-by: Uwe Kleine-König <ukleinek@kernel.org>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com> # for I2C
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Mark Brown <broonie@kernel.org>
Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> # for IIO
Acked-by: Andi Shyti <andi.shyti@kernel.org>
Acked-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20240617065828.9531-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2024-07-09 07:40:17 -06:00

69 lines
1.6 KiB
YAML

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/imx6ul-clock.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Freescale i.MX6 UltraLite Clock Controller
maintainers:
- Abel Vesa <abelvesa@kernel.org>
- Peng Fan <peng.fan@nxp.com>
properties:
compatible:
const: fsl,imx6ul-ccm
reg:
maxItems: 1
interrupts:
description: CCM provides 2 interrupt requests, request 1 is to generate
interrupt for frequency or mux change, request 2 is to generate
interrupt for oscillator read or PLL lock.
items:
- description: CCM interrupt request 1
- description: CCM interrupt request 2
'#clock-cells':
const: 1
clocks:
items:
- description: 32k osc
- description: 24m osc
- description: ipp_di0 clock input
- description: ipp_di1 clock input
clock-names:
items:
- const: ckil
- const: osc
- const: ipp_di0
- const: ipp_di1
required:
- compatible
- reg
- interrupts
- '#clock-cells'
- clocks
- clock-names
additionalProperties: false
examples:
# Clock Control Module node:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
clock-controller@20c4000 {
compatible = "fsl,imx6ul-ccm";
reg = <0x020c4000 0x4000>;
interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
#clock-cells = <1>;
clocks = <&ckil>, <&osc>, <&ipp_di0>, <&ipp_di1>;
clock-names = "ckil", "osc", "ipp_di0", "ipp_di1";
};