1a3e93814c
i.MX8M Family features an anatop module the produces PLL to clock control module(CCM) root clock. Add the missing yaml file. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
52 lines
979 B
YAML
52 lines
979 B
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/fsl,imx8m-anatop.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: NXP i.MX8M Family Anatop Module
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maintainers:
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- Peng Fan <peng.fan@nxp.com>
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description: |
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NXP i.MX8M Family anatop PLL module which generates PLL to CCM root.
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properties:
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compatible:
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oneOf:
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- enum:
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- fsl,imx8mm-anatop
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- fsl,imx8mq-anatop
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- items:
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- enum:
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- fsl,imx8mn-anatop
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- fsl,imx8mp-anatop
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- const: fsl,imx8mm-anatop
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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'#clock-cells':
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const: 1
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required:
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- compatible
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- reg
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- '#clock-cells'
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additionalProperties: false
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examples:
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- |
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anatop: clock-controller@30360000 {
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compatible = "fsl,imx8mn-anatop", "fsl,imx8mm-anatop";
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reg = <0x30360000 0x10000>;
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#clock-cells = <1>;
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};
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...
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