22d121281e
Add bindings for SAM9X7's slow clock controller. Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@tuxon.dev> Link: https://lore.kernel.org/r/20240729070717.1990654-1-varshini.rajendran@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
73 lines
1.4 KiB
YAML
73 lines
1.4 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
|
%YAML 1.2
|
|
---
|
|
$id: http://devicetree.org/schemas/clock/atmel,at91sam9x5-sckc.yaml#
|
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
|
|
|
title: Atmel Slow Clock Controller (SCKC)
|
|
|
|
maintainers:
|
|
- Claudiu Beznea <claudiu.beznea@microchip.com>
|
|
|
|
properties:
|
|
compatible:
|
|
oneOf:
|
|
- enum:
|
|
- atmel,at91sam9x5-sckc
|
|
- atmel,sama5d3-sckc
|
|
- atmel,sama5d4-sckc
|
|
- microchip,sam9x60-sckc
|
|
- items:
|
|
- enum:
|
|
- microchip,sam9x7-sckc
|
|
- microchip,sama7g5-sckc
|
|
- const: microchip,sam9x60-sckc
|
|
|
|
reg:
|
|
maxItems: 1
|
|
|
|
clocks:
|
|
maxItems: 1
|
|
|
|
"#clock-cells":
|
|
enum: [0, 1]
|
|
|
|
atmel,osc-bypass:
|
|
type: boolean
|
|
description: set when a clock signal is directly provided on XIN
|
|
|
|
required:
|
|
- compatible
|
|
- reg
|
|
- clocks
|
|
- "#clock-cells"
|
|
|
|
allOf:
|
|
- if:
|
|
properties:
|
|
compatible:
|
|
contains:
|
|
enum:
|
|
- microchip,sam9x60-sckc
|
|
then:
|
|
properties:
|
|
"#clock-cells":
|
|
const: 1
|
|
else:
|
|
properties:
|
|
"#clock-cells":
|
|
const: 0
|
|
|
|
additionalProperties: false
|
|
|
|
examples:
|
|
- |
|
|
clk32k: clock-controller@fffffe50 {
|
|
compatible = "microchip,sam9x60-sckc";
|
|
reg = <0xfffffe50 0x4>;
|
|
clocks = <&slow_xtal>;
|
|
#clock-cells = <1>;
|
|
};
|
|
|
|
...
|