fc1c7f941c
Add the peripherals clock controller dt-bindings for Amlogic C3 SoC family Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Co-developed-by: Chuan Liu <chuan.liu@amlogic.com> Signed-off-by: Chuan Liu <chuan.liu@amlogic.com> Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com> Link: https://lore.kernel.org/r/20240522082727.3029656-4-xianwei.zhao@amlogic.com Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
121 lines
3.2 KiB
YAML
121 lines
3.2 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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# Copyright (C) 2022-2023 Amlogic, Inc. All rights reserved
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/amlogic,c3-peripherals-clkc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Amlogic C3 series Peripheral Clock Controller
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maintainers:
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- Neil Armstrong <neil.armstrong@linaro.org>
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- Jerome Brunet <jbrunet@baylibre.com>
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- Xianwei Zhao <xianwei.zhao@amlogic.com>
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- Chuan Liu <chuan.liu@amlogic.com>
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properties:
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compatible:
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const: amlogic,c3-peripherals-clkc
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reg:
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maxItems: 1
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clocks:
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minItems: 16
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items:
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- description: input oscillator (usually at 24MHz)
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- description: input oscillators multiplexer
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- description: input fix pll
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- description: input fclk div 2
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- description: input fclk div 2p5
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- description: input fclk div 3
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- description: input fclk div 4
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- description: input fclk div 5
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- description: input fclk div 7
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- description: input gp0 pll
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- description: input gp1 pll
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- description: input hifi pll
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- description: input sys clk
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- description: input axi clk
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- description: input sys pll div 16
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- description: input cpu clk div 16
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- description: input pad clock for rtc clk (optional)
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clock-names:
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minItems: 16
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items:
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- const: xtal_24m
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- const: oscin
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- const: fix
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- const: fdiv2
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- const: fdiv2p5
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- const: fdiv3
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- const: fdiv4
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- const: fdiv5
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- const: fdiv7
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- const: gp0
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- const: gp1
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- const: hifi
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- const: sysclk
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- const: axiclk
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- const: sysplldiv16
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- const: cpudiv16
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- const: pad_osc
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"#clock-cells":
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const: 1
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required:
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- compatible
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- reg
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- clocks
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- clock-names
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- "#clock-cells"
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additionalProperties: false
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examples:
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- |
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apb {
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#address-cells = <2>;
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#size-cells = <2>;
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clock-controller@0 {
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compatible = "amlogic,c3-peripherals-clkc";
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reg = <0x0 0x0 0x0 0x49c>;
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#clock-cells = <1>;
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clocks = <&xtal_24m>,
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<&scmi_clk 8>,
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<&scmi_clk 12>,
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<&clkc_pll 3>,
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<&clkc_pll 5>,
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<&clkc_pll 7>,
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<&clkc_pll 9>,
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<&clkc_pll 11>,
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<&clkc_pll 13>,
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<&clkc_pll 15>,
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<&scmi_clk 13>,
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<&clkc_pll 17>,
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<&scmi_clk 9>,
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<&scmi_clk 10>,
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<&scmi_clk 14>,
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<&scmi_clk 15>;
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clock-names = "xtal_24m",
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"oscin",
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"fix",
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"fdiv2",
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"fdiv2p5",
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"fdiv3",
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"fdiv4",
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"fdiv5",
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"fdiv7",
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"gp0",
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"gp1",
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"hifi",
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"sysclk",
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"axiclk",
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"sysplldiv16",
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"cpudiv16";
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};
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};
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