dc8ea9204b
There's a bunch of bindings for (mostly l2) cache controllers scattered to the four winds, move them to a common directory. I renamed the freescale l2cache.txt file, as while that might make sense when the parent dir is fsl, it's confusing after the move. The two Marvell bindings have had a "marvell," prefix added to match their compatibles. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230330173255.109731-1-conor@kernel.org Signed-off-by: Rob Herring <robh@kernel.org>
17 lines
414 B
Plaintext
17 lines
414 B
Plaintext
* Marvell Feroceon Cache
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Required properties:
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- compatible : Should be either "marvell,feroceon-cache" or
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"marvell,kirkwood-cache".
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Optional properties:
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- reg : Address of the L2 cache control register. Mandatory for
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"marvell,kirkwood-cache", not used by "marvell,feroceon-cache"
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Example:
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l2: l2-cache@20128 {
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compatible = "marvell,kirkwood-cache";
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reg = <0x20128 0x4>;
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};
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