abc6b02691
Marvell Berlin SoCs (later Syna) bindings were marked as
work-in-progress / unstable in 2015 in commit f07b4e49d2 ("Documentation:
bindings: berlin: consider our dt bindings as unstable"). Almost nine
years is enough, so drop the "unstable" remark and expect usual ABI
rules.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240224084414.6264-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Rob Herring <robh@kernel.org>
90 lines
2.6 KiB
Plaintext
90 lines
2.6 KiB
Plaintext
Synaptics SoC Device Tree Bindings
|
|
|
|
According to https://www.synaptics.com/company/news/conexant-marvell
|
|
Synaptics has acquired the Multimedia Solutions Business of Marvell, so
|
|
berlin SoCs are now Synaptics' SoCs now.
|
|
|
|
---------------------------------------------------------------
|
|
|
|
Boards with a SoC of the Marvell Berlin family, e.g. Armada 1500
|
|
shall have the following properties:
|
|
|
|
* Required root node properties:
|
|
compatible: must contain "marvell,berlin"
|
|
|
|
In addition, the above compatible shall be extended with the specific
|
|
SoC and board used. Currently known SoC compatibles are:
|
|
"marvell,berlin2" for Marvell Armada 1500 (BG2, 88DE3100),
|
|
"marvell,berlin2cd" for Marvell Armada 1500-mini (BG2CD, 88DE3005)
|
|
"marvell,berlin2ct" for Marvell Armada ? (BG2CT, 88DE????)
|
|
"marvell,berlin2q" for Marvell Armada 1500-pro (BG2Q, 88DE3114)
|
|
"marvell,berlin3" for Marvell Armada ? (BG3, 88DE????)
|
|
|
|
* Example:
|
|
|
|
/ {
|
|
model = "Sony NSZ-GS7";
|
|
compatible = "sony,nsz-gs7", "marvell,berlin2", "marvell,berlin";
|
|
|
|
...
|
|
}
|
|
|
|
* Marvell Berlin CPU control bindings
|
|
|
|
CPU control register allows various operations on CPUs, like resetting them
|
|
independently.
|
|
|
|
Required properties:
|
|
- compatible: should be "marvell,berlin-cpu-ctrl"
|
|
- reg: address and length of the register set
|
|
|
|
Example:
|
|
|
|
cpu-ctrl@f7dd0000 {
|
|
compatible = "marvell,berlin-cpu-ctrl";
|
|
reg = <0xf7dd0000 0x10000>;
|
|
};
|
|
|
|
* Marvell Berlin2 chip control binding
|
|
|
|
Marvell Berlin SoCs have a chip control register set providing several
|
|
individual registers dealing with pinmux, padmux, clock, reset, and secondary
|
|
CPU boot address. Unfortunately, the individual registers are spread among the
|
|
chip control registers, so there should be a single DT node only providing the
|
|
different functions which are described below.
|
|
|
|
Required properties:
|
|
- compatible:
|
|
* the first and second values must be:
|
|
"simple-mfd", "syscon"
|
|
- reg: address and length of following register sets for
|
|
BG2/BG2CD: chip control register set
|
|
BG2Q: chip control register set and cpu pll registers
|
|
|
|
* Marvell Berlin2 system control binding
|
|
|
|
Marvell Berlin SoCs have a system control register set providing several
|
|
individual registers dealing with pinmux, padmux, and reset.
|
|
|
|
Required properties:
|
|
- compatible:
|
|
* the first and second values must be:
|
|
"simple-mfd", "syscon"
|
|
- reg: address and length of the system control register set
|
|
|
|
Example:
|
|
|
|
chip: chip-control@ea0000 {
|
|
compatible = "simple-mfd", "syscon";
|
|
reg = <0xea0000 0x400>;
|
|
|
|
/* sub-device nodes */
|
|
};
|
|
|
|
sysctrl: system-controller@d000 {
|
|
compatible = "simple-mfd", "syscon";
|
|
reg = <0xd000 0x100>;
|
|
|
|
/* sub-device nodes */
|
|
};
|