8373767b94
Add dedicated bindings for the FPGA syscon registers on ARM Juno board, to fully document the block and also fix dtbs_check warning: juno.dtb: apbregs@10000: compatible: ['syscon', 'simple-mfd'] is too short Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20240518203903.119608-1-krzysztof.kozlowski@linaro.org Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
62 lines
1.2 KiB
YAML
62 lines
1.2 KiB
YAML
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/arm/arm,juno-fpga-apb-regs.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: ARM Juno FPGA APB Registers
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maintainers:
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- Sudeep Holla <sudeep.holla@arm.com>
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properties:
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compatible:
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items:
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- const: arm,juno-fpga-apb-regs
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- const: syscon
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- const: simple-mfd
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reg:
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maxItems: 1
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ranges: true
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"#address-cells":
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const: 1
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"#size-cells":
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const: 1
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patternProperties:
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"^led@[0-9a-f]+,[0-9a-f]$":
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$ref: /schemas/leds/register-bit-led.yaml#
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required:
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- compatible
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- reg
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- ranges
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- "#address-cells"
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- "#size-cells"
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additionalProperties: false
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examples:
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- |
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syscon@10000 {
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compatible = "arm,juno-fpga-apb-regs", "syscon", "simple-mfd";
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reg = <0x010000 0x1000>;
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ranges = <0x0 0x10000 0x1000>;
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#address-cells = <1>;
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#size-cells = <1>;
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led@8,0 {
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compatible = "register-bit-led";
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reg = <0x08 0x04>;
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offset = <0x08>;
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mask = <0x01>;
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label = "vexpress:0";
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linux,default-trigger = "heartbeat";
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default-state = "on";
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};
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};
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