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.. SPDX-License-Identifier: GPL-2.0
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========================================
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ACPI considerations for PCI host bridges
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========================================
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The general rule is that the ACPI namespace should describe everything the
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OS might use unless there's another way for the OS to find it [1, 2].
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For example, there's no standard hardware mechanism for enumerating PCI
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host bridges, so the ACPI namespace must describe each host bridge, the
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method for accessing PCI config space below it, the address space windows
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the host bridge forwards to PCI (using _CRS), and the routing of legacy
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INTx interrupts (using _PRT).
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PCI devices, which are below the host bridge, generally do not need to be
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described via ACPI. The OS can discover them via the standard PCI
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enumeration mechanism, using config accesses to discover and identify
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devices and read and size their BARs. However, ACPI may describe PCI
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devices if it provides power management or hotplug functionality for them
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or if the device has INTx interrupts connected by platform interrupt
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controllers and a _PRT is needed to describe those connections.
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ACPI resource description is done via _CRS objects of devices in the ACPI
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namespace [2]. The _CRS is like a generalized PCI BAR: the OS can read
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_CRS and figure out what resource is being consumed even if it doesn't have
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a driver for the device [3]. That's important because it means an old OS
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can work correctly even on a system with new devices unknown to the OS.
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The new devices might not do anything, but the OS can at least make sure no
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resources conflict with them.
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Static tables like MCFG, HPET, ECDT, etc., are *not* mechanisms for
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reserving address space. The static tables are for things the OS needs to
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know early in boot, before it can parse the ACPI namespace. If a new table
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is defined, an old OS needs to operate correctly even though it ignores the
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table. _CRS allows that because it is generic and understood by the old
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OS; a static table does not.
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If the OS is expected to manage a non-discoverable device described via
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ACPI, that device will have a specific _HID/_CID that tells the OS what
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driver to bind to it, and the _CRS tells the OS and the driver where the
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device's registers are.
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PCI host bridges are PNP0A03 or PNP0A08 devices. Their _CRS should
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describe all the address space they consume. This includes all the windows
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they forward down to the PCI bus, as well as registers of the host bridge
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itself that are not forwarded to PCI. The host bridge registers include
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things like secondary/subordinate bus registers that determine the bus
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range below the bridge, window registers that describe the apertures, etc.
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These are all device-specific, non-architected things, so the only way a
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PNP0A03/PNP0A08 driver can manage them is via _PRS/_CRS/_SRS, which contain
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the device-specific details. The host bridge registers also include ECAM
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space, since it is consumed by the host bridge.
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ACPI defines a Consumer/Producer bit to distinguish the bridge registers
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("Consumer") from the bridge apertures ("Producer") [4, 5], but early
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BIOSes didn't use that bit correctly. The result is that the current ACPI
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spec defines Consumer/Producer only for the Extended Address Space
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descriptors; the bit should be ignored in the older QWord/DWord/Word
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Address Space descriptors. Consequently, OSes have to assume all
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QWord/DWord/Word descriptors are windows.
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Prior to the addition of Extended Address Space descriptors, the failure of
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Consumer/Producer meant there was no way to describe bridge registers in
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the PNP0A03/PNP0A08 device itself. The workaround was to describe the
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bridge registers (including ECAM space) in PNP0C02 catch-all devices [6].
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With the exception of ECAM, the bridge register space is device-specific
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anyway, so the generic PNP0A03/PNP0A08 driver (pci_root.c) has no need to
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know about it.
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New architectures should be able to use "Consumer" Extended Address Space
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descriptors in the PNP0A03 device for bridge registers, including ECAM,
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although a strict interpretation of [6] might prohibit this. Old x86 and
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ia64 kernels assume all address space descriptors, including "Consumer"
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Extended Address Space ones, are windows, so it would not be safe to
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describe bridge registers this way on those architectures.
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PNP0C02 "motherboard" devices are basically a catch-all. There's no
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programming model for them other than "don't use these resources for
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anything else." So a PNP0C02 _CRS should claim any address space that is
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(1) not claimed by _CRS under any other device object in the ACPI namespace
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and (2) should not be assigned by the OS to something else.
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The PCIe spec requires the Enhanced Configuration Access Method (ECAM)
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unless there's a standard firmware interface for config access, e.g., the
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ia64 SAL interface [7]. A host bridge consumes ECAM memory address space
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and converts memory accesses into PCI configuration accesses. The spec
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defines the ECAM address space layout and functionality; only the base of
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the address space is device-specific. An ACPI OS learns the base address
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from either the static MCFG table or a _CBA method in the PNP0A03 device.
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The MCFG table must describe the ECAM space of non-hot pluggable host
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bridges [8]. Since MCFG is a static table and can't be updated by hotplug,
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a _CBA method in the PNP0A03 device describes the ECAM space of a
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hot-pluggable host bridge [9]. Note that for both MCFG and _CBA, the base
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address always corresponds to bus 0, even if the bus range below the bridge
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(which is reported via _CRS) doesn't start at 0.
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[1] ACPI 6.2, sec 6.1:
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For any device that is on a non-enumerable type of bus (for example, an
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ISA bus), OSPM enumerates the devices' identifier(s) and the ACPI
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system firmware must supply an _HID object ... for each device to
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enable OSPM to do that.
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[2] ACPI 6.2, sec 3.7:
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The OS enumerates motherboard devices simply by reading through the
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ACPI Namespace looking for devices with hardware IDs.
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Each device enumerated by ACPI includes ACPI-defined objects in the
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ACPI Namespace that report the hardware resources the device could
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occupy [_PRS], an object that reports the resources that are currently
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used by the device [_CRS], and objects for configuring those resources
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[_SRS]. The information is used by the Plug and Play OS (OSPM) to
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configure the devices.
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[3] ACPI 6.2, sec 6.2:
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OSPM uses device configuration objects to configure hardware resources
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for devices enumerated via ACPI. Device configuration objects provide
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information about current and possible resource requirements, the
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relationship between shared resources, and methods for configuring
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hardware resources.
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When OSPM enumerates a device, it calls _PRS to determine the resource
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requirements of the device. It may also call _CRS to find the current
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resource settings for the device. Using this information, the Plug and
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Play system determines what resources the device should consume and
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sets those resources by calling the device’s _SRS control method.
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In ACPI, devices can consume resources (for example, legacy keyboards),
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provide resources (for example, a proprietary PCI bridge), or do both.
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Unless otherwise specified, resources for a device are assumed to be
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taken from the nearest matching resource above the device in the device
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hierarchy.
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[4] ACPI 6.2, sec 6.4.3.5.1, 2, 3, 4:
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QWord/DWord/Word Address Space Descriptor (.1, .2, .3)
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General Flags: Bit [0] Ignored
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Extended Address Space Descriptor (.4)
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General Flags: Bit [0] Consumer/Producer:
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* 1 – This device consumes this resource
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* 0 – This device produces and consumes this resource
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[5] ACPI 6.2, sec 19.6.43:
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ResourceUsage specifies whether the Memory range is consumed by
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this device (ResourceConsumer) or passed on to child devices
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(ResourceProducer). If nothing is specified, then
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ResourceConsumer is assumed.
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[6] PCI Firmware 3.2, sec 4.1.2:
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If the operating system does not natively comprehend reserving the
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MMCFG region, the MMCFG region must be reserved by firmware. The
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address range reported in the MCFG table or by _CBA method (see Section
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4.1.3) must be reserved by declaring a motherboard resource. For most
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systems, the motherboard resource would appear at the root of the ACPI
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namespace (under \_SB) in a node with a _HID of EISAID (PNP0C02), and
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the resources in this case should not be claimed in the root PCI bus’s
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_CRS. The resources can optionally be returned in Int15 E820 or
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EFIGetMemoryMap as reserved memory but must always be reported through
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ACPI as a motherboard resource.
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[7] PCI Express 4.0, sec 7.2.2:
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For systems that are PC-compatible, or that do not implement a
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processor-architecture-specific firmware interface standard that allows
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access to the Configuration Space, the ECAM is required as defined in
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this section.
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[8] PCI Firmware 3.2, sec 4.1.2:
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The MCFG table is an ACPI table that is used to communicate the base
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addresses corresponding to the non-hot removable PCI Segment Groups
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range within a PCI Segment Group available to the operating system at
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boot. This is required for the PC-compatible systems.
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The MCFG table is only used to communicate the base addresses
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corresponding to the PCI Segment Groups available to the system at
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boot.
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[9] PCI Firmware 3.2, sec 4.1.3:
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The _CBA (Memory mapped Configuration Base Address) control method is
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an optional ACPI object that returns the 64-bit memory mapped
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configuration base address for the hot plug capable host bridge. The
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base address returned by _CBA is processor-relative address. The _CBA
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control method evaluates to an Integer.
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This control method appears under a host bridge object. When the _CBA
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method appears under an active host bridge object, the operating system
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evaluates this structure to identify the memory mapped configuration
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base address corresponding to the PCI Segment Group for the bus number
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range specified in _CRS method. An ACPI name space object that contains
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the _CBA method must also contain a corresponding _SEG method.
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