This driver is a Full / Low speed only USB host for the i.MX21.
Signed-off-by: Martin Fuzzey <mfuzzey@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Removed selection of COMMON_CLKDEV by CONFIG_ARCH_MX5. This is handled
in 03e09cd890.
arch/arm/plat-mxc/iomux-mx1-mx2.c was moved to
arch/arm/plat-mxc/iomux-v1.c in 5e2e95f520
and got bug fixed in 5c17ef878f. The bug
in arch/arm/plat-mxc/iomux-v1.c isn't present any more since
bac3fcfad5, so
arch/arm/plat-mxc/iomux-mx1-mx2.c is simply deleted.
Conflicts:
arch/arm/plat-mxc/Kconfig
arch/arm/plat-mxc/Makefile
arch/arm/plat-mxc/iomux-mx1-mx2.c
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
ARCH_MXC_IOMUX_V3 is not specific to the i.MX25 PDK platform. Thus,
ARCH_MXC_IOMUX_V3 should be selected by ARCH_MX25.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
mxc_gpio_mode checks for invalid pins and so it returns zero for
success, -EINVAL for invalid pins.
While at it, remove definitions of GPIO_PORT_MAX removed as they are
unused now.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Addionally make iomux-mx*.h headers stand-alone and similar to iomux-v3
platform files should include their platform iomux header from now on.
For now iomux.h simply includes all iomux-v1 platform headers and so
provides compatibility until all files are converted.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
- use __MACH_IOMUX_MX3_H__ as header protector analogous to
<mach/mx...h>
- use tabs for indention
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
- use __MACH_IOMUX_MX2x_H__ as header protector analogous to
<mach/mx...h>
- use tabs for indention
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
- use __MACH_IOMUX_MX27_H__ as header protector analogous to
<mach/mx...h>
- use tabs for indention
- fix sorting
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
- use __MACH_IOMUX_MX25_H__ as header protector analogous to
<mach/mx...h>
- remove doxygen comments
- remove #error about mach/iomux.h which is unused on mx25
- remove #ifndef __ASSEMBLY__ which is unneeded here
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
- use __MACH_IOMUX_MX21_H__ as header protector analogous to
<mach/mx...h>
- use tabs for indention
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
- use __MACH_IOMUX_MX1_H__ as header protector analogous to
<mach/mx...h>
- use tabs for indention
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
While at it move register modification to static inlines and
so make the relevant code more readable.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
MXC_IRQ_PRIOR, MXC_PWM and ARCH_HAS_RNGA are all defined in an "if
ARCH_MXC" ... "endif" block, so they depend on ARCH_MXC anyhow.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
This is broken since at least one year when
ec996ba (mxc timer: make compile time independent)
removed the symbol MXC_TCN.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Now if the problem occurs that triggered the BUG_ON before, the machine
runs in a NULL pointer dereference. So it wouldn't be much harder now
to debug the situation if it occured.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
As in most cases only few irqs are pending using fls is more effective
than looping over all bits.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
GPIO_INT_LOW_LEV is defined as
(cpu_is_mx1_mx2() ? 0x3 : 0x0)
so depending on compiler optimisation and enabled SoCs this doesn't
qualify as a constant expression as needed by a switch statement.
Ditto for GPIO_INT_HIGH_LEV.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
The commit also introduces the HAVE_FB_IMX config that is to be selected from
the MX25 platform config. Once this commit gets merged, the two other i.MX
archs, ARCH_MX1 and ARCH_MX2, should follow this one.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Makes it consistent with VMALLOC_START
Tested-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: Andreas Fenkart <andreas.fenkart@streamunlimited.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Otherwise more complicated uart configuration won't be possible.
We can use r1 for tmp register for both head.S and debug.S.
NOTE: This patch depends on another patch to add the the tmp register
into all debug-macro.S files. That can be done with:
$ sed -i -e "s/addruart,rx|addruart, rx/addruart, rx, tmp/"
arch/arm/*/include/*/debug-macro.S
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This baseboard is used on the handbot and eybot robots.
The sel gpios are used as enables and rst signals on smartbot, thus the
sel init is moved from mx31moboard file to board files.
Signed-off-by: Valentin Longchamp <valentin.longchamp@epfl.ch>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Babbage is a reference board from Freescale for their i.MX51 SoC.
Add board definition, Kconfig and Makefiles to enable Freescale i.MX51
processor and Babbage board.
Boot tested on a Babbage2.5 board
Signed-off-by: Amit Kucheria <amit.kucheria@canonical.com>
Add basic clock support, cpu identification, I/O mapping, interrupt
controller, serial port and ethernet.
Signed-off-by: Amit Kucheria <amit.kucheria@canonical.com>
Refactor the timer code into version 1 and version 2.
Essentially there are 2 versions of the timer hardware on Freescale MXC
hardware. Version 1 is found on MX1/MXL, MX21 and MX27. Version 2 is found on
MX25, MX31, MX35, MX37, MX51, and future parts.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Amit Kucheria <amit.kucheria@canonical.com>
Freescale i.MX51 processor uses a new interrupt controller. Add
driver for TrustZone Interrupt Controller
Signed-off-by: Amit Kucheria <amit.kucheria@canonical.com>
- The SIC mask is only 2bits wide, not 4
- MX31_OTG_PM_BIT and MX31_H1_PM_BIT use negative logic
- clear MX31_H1_DT_BIT and MX31_H2_DT_BIT so that they can be cleared,
not only set.
- return -EINVAL if called with an invalid controller number
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Daniel Mack <daniel@caiaq.de>
