Regions are requested twice during initialization causing the second
one to fail. This is regression introduced during iomap conversion.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Add Adaptec 1220SA (SIL3132) to devices claimed by sata_sil24
Patch generated against 2.6.20.2
Signed-off-by: Jamie Clark <jclark@metaparadigm.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
->prereset() returns -ENOENT to tell libata that the port is empty and
reset sequencing should be stopped. This is not an error condition.
Update ata_eh_reset() such that it sets device classes to ATA_DEV_NONE
and return success in on -ENOENT. This makes spurious error message
go away.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
The ACPI specification states, and BIOS implementations depend on,
_STM being called before _GTF.
SATA does this, but PATA does not. So for now, simply
prevent execution of _GTF on PATA devices. Longer term we
should implement ACPI support for PATA devices in libata.
Signed-off-by: Kristen Accardi <kristen.c.accardi@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
Commit 721449bf0d added support for using the
ADMA notifier bits to determine which commands to check for completion.
However there have been reports that this causes command timeouts in certain
cases. This is still being investigated. In addition, apparently the notifiers
won't work if ADMA is disabled on the other port as a result of an ATAPI device
being connected, and we don't handle this case properly.
For now, just restore the previous behavior of checking all active commands
to see if they are complete, without relying on the notifiers.
Signed-off-by: Robert Hancock <hancockr@shaw.ca>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Recently I got my hands on nVidia's MCP61 PM-AM board, and
it contains IDE chip configured by BIOS with only primary
channel enabled. This confuses code which probes for
device DMA capabilities - it gets 0x60 (happy duplex
device) from primary channel BMDMA, but 0xFF (nobody here)
from secondary channel BMDMA. Due to this code then believes
that chip is simplex. I do not address this problem in
my patch, as I'm not sure how to handle this. Probably
ata_pci_init_one should have bitmap of enabled/possible
interfaces instead of their count, but it looks like
quite intrusive change, and maybe we do not care - for device
with only one channel simplex and regular DMA engines are
same.
But making device simplex pointed out that support for
DMA on simplex devices is currently broken - ata_dev_xfermask
tests whether device is simplex and if it is whether DMA
engine was assigned to this port. If not then it strips
out DMA bits from device. Problem is that code which assigns
DMA engine to port in ata_set_mode first detect device
mode and assigns DMA engine to channel only if some DMA
capable device was found.
And as xfermask stripped out DMA bits, host->simplex_claimed
is always NULL with current implementation.
By allowing DMA either if simplex_claimed is NULL or if it
points to current port DMA can be finally used - it gets
assigned to first port which contains any DMA capable
device.
Before:
pata_amd 0000:00:06.0: version 0.2.8
PCI: Setting latency timer of device 0000:00:06.0 to 64
ata5: PATA max UDMA/133 cmd 0x000101f0 ctl 0x000103f6 bmdma 0x0001f000 irq 14
ata6: PATA max UDMA/133 cmd 0x00010170 ctl 0x00010376 bmdma 0x0001f008 irq 15
scsi4 : pata_amd
ata5.00: ATAPI, max UDMA/66
ata5.00: simplex DMA is claimed by other device, disabling DMA
ata5.00: configured for PIO4
scsi5 : pata_amd
ata6: port disabled. ignoring.
ata6: reset failed, giving up
scsi 4:0:0:0: CD-ROM ATAPI DVD W DH16W1P LG12 PQ: 0 ANSI: 5
After:
pata_amd 0000:00:06.0: version 0.2.8
PCI: Setting latency timer of device 0000:00:06.0 to 64
ata5: PATA max UDMA/133 cmd 0x000101f0 ctl 0x000103f6 bmdma 0x0001f000 irq 14
ata6: PATA max UDMA/133 cmd 0x00010170 ctl 0x00010376 bmdma 0x0001f008 irq 15
scsi4 : pata_amd
ata5.00: ATAPI, max UDMA/66
ata5.00: configured for UDMA/33
scsi5 : pata_amd
ata6: port disabled. ignoring.
ata6: reset failed, giving up
scsi 4:0:0:0: CD-ROM ATAPI DVD W DH16W1P LG12 PQ: 0 ANSI: 5
Signed-off-by: Petr Vandrovec <petr@vandrovec.name>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
A while ago I modified the libata code so that drivers can return -ENOENT
for unknown ports not fiddle with the EH flags and print stuff directly.
Somewhere along the line ata_piix didn't get fully converted.
Signed-off-by: Alan Cox <alan@redhat.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
For 2.6.20 it mostly used to just not work, for 2.6.21-rc it crashes, this
seems to be down to luck (bad or good). The libata-acpi code needs to
avoid doing PCI work on non-PCI devices. This is one hack although it's
not pretty and perhaps there is a "right" way to check if a struct device
* is PCI ?
Signed-off-by: Alan Cox <alan@redhat.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Fix wrong "port" calculations in pdc202xx_{configure_piomode,set_dmamode}()
They were broken for all configurations except one (master device on primary
channel, no other devices) and as a result device settings + PIO/DMA timings
were being programmed into the wrong PCI registers. This could result in
a large variety of problems including data corruption, hangs etc. (depending
on devices used and your luck :-).
ap->port_no ap->devno used PCI registers correct PCI registers
0 0 0x60-0x62 0x60-0x62
0 1 0x62-0x64 0x64-0x66
1 0 0x64-0x66 0x68-0x6a
1 1 0x66-0x68 0x6c-0x6e
Also forward port recent fixes from drivers/ide pdc202xx_old driver:
* fix XFER_MW_DMA0 timings (they were overclocked, use the official ones)
* fix bitmasks for clearing bits of register B:
- when programming DMA mode bit 0x10 of register B was cleared which
resulted in overclocked PIO timing setting (iff PIO0 was used)
- when programming PIO mode bits 0x18 weren't cleared so suboptimal
timings were used for PIO1-4 if PIO0 was previously set (bit 0x10)
and for PIO0/3/4 if PIO1/2 was previously set (bit 0x08)
and finally bump driver version.
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
pata_legacy fails to detect the disk on my old ISA/VLB 486:
it starts to probe io=0x1f0 ctr=0x3f6 irq=15, complains
loudly about IDENTIFYs timing out, and finally fails.
(Sorry I couldn't capture the kernel's boot messages.)
It turns out that the driver's mapping from io to irq in
legacy_irq[] is wrong: index 0 for io=0x1f0 has irq=15 but
should have irq=14, and index 1 for io=0x170 has irq=14 but
should have irq=15. This is confirmed by a comparison with
include/asm-i386/ide.h:ide_default_irq().
This patch swaps the first two elements in legacy_irq[],
which makes pata_legacy work on my 486.
Signed-off-by: Mikael Pettersson <mikpe@it.uu.se>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
This patch adds the Intel ICH9M RAID controller DID for SATA support.
Signed-off-by: Jason Gaston <jason.d.gaston@intel.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Conditionalize all PM related stuff in libata core layer using
CONFIG_PM.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Add missing #ifdef CONFIG_PM conditionals around all PM related parts
in libata LLDs.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Some LLDs were missing scsi device PM callbacks while having host/port
suspend support. Add missing ones.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
The QDI init code contains some bugs which mean it only works if you have
a test setup that causes both a successful and failed probe. Fix this
Found by Philip Guo
(Who found it working on code analysis tools not running VLB IDE
controllers)
Signed-off-by: Alan Cox <alan@redhat.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Alan Cox noticed several hooks in pata_* drivers were missing, when
he authored his ->cable_detect hook patches. This patch extracts
just those fixes from Alan's patches, adding the necessary hooks
(usually ->freeze, ->thaw, and ->post_internal_cmd) to the drivers.
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2.6.21-rc has horrible problems with libata and PATA cable types (and
thus speeds). This occurs because Tejun fixed a pile of other bugs and
we now do cable detect enforcement for drive side detection properly.
Unfortunately we don't do the process around cable detection right. Tejun
identified the problem and pointed to the right Annex in the spec, this patch
implements the needed changes.
The basic requirement is that we have to identify the slave before the
master.
The patch switches the identify order so that we can do the drive side
detection correctly.
[NOTE: patch and description extracted from a larger work written
and signed-off-by Alan Cox]
Signed-off-by: Jeff Garzik <jeff@garzik.org>
The initial simplex handling code is fooled if you suspend and resume.
This also causes problems with some single channel controllers which
claim to be simplex.
The fix is fairly simple, instead of keeping a flag to remember if we
gave away the simplex channel we remember the actual owner. As the owner
is always part of the host_set we don't even need a refcount.
Knowing the owner also means we can reassign simplex DMA channels in
future hotplug code etc if we need to
Signed-off-by: Alan Cox <alan@redhat.com>
(and a signed-off for the patch I sent before while I remember)
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Spurious SDB FIS during NCQ might not contain spurious completions.
It could be spurious TF update or invalid async notification. Treat
as HSM violation iff a spurious SDB FIS contains spurious completions;
otherwise, just whine once about it.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Make jmiron_ata quirk update pdev->class after programming the device
and update ahci and pata_jmicron such that they match class code
instead of checking function number manually. For ahci, it matches
for vendor and class. For pata_jmicron, it matches vendor, device and
class as IDE class isn't as well defined as AHCI class.
This makes jmicron device matching more conventional and script
friendly.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Channel redirect and AHCI mode enable programmings are done via PCI
quirk for both probe and resume paths. Drop duplicate and possibly
unsafe device programming from pata_jmicron().
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Blacklist FUJITSU MHT2060BH for NCQ. On this drive, NCQ works iff
queue depth is equal to or less than 4. Just turn it off.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Cc: Mike Accetta <maccetta@laurelnetworks.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Kill unused local variable idx in sil24_fill_sg().
Spotted by Jeff Garzik.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Cc: Jeff Garzik <jeff@garzik.org>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Clearing drvdata in ->remove_one causes NULL pointer deference. Clear
drvdata only in ata_host_release() after all resources are freed.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
IRQ mask bits assumed a 60xx or newer generation chip, which is very
wrong for the 50xx series. Luckily both generations shared the per-port
interrupt mask bits, leaving only the "misc chip features" bits to be
completely mismatched.
Fix 50xx by ensuring we only program bits that exist.
Signed-off-by: Jeff Garzik <jeff@garzik.org>
The code in mv_edma_cfg() reflected its 60xx origins, by doing things
[slightly] incorrectly on the older 50xx and newer 6042/7042 chips.
Clean up the EDMA configuration setup such that, each chip family
carefully initializes its own EDMA setup.
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Manuel Lass reports:
> This bug is also present in 2.6.21-rc1, and this patch
> indeed fixes it.
The change to the devres layer re-orders the execution of cleanup
functions and in turn causes the pcmcia layer to oops as it zaps a
pointer now needed later on. We simply leave the pointer alone.
Signed-off-by: Alan Cox <alan@redhat.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Also export dev_disable as this is needed by drivers doing slave decode
filtering, which will follow shortly
Signed-off-by: Alan Cox <alan@redhat.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Each place in pdc_ata_init_one() that initialises a SATA
port first calls pdc_ata_setup_port(), and then manually
assigns the port's ->scr_addr. Simplify the code by extending
pdc_ata_setup_port() to also handle scr_addr initialisation;
for PATA ports we pass NULL as scr_addr.
The initialisation of the PATA-only 20619 redundantly set
up scr_addr for the ports. Remove this.
Tested on 20619, 20575, and 20775 chips.
Signed-off-by: Mikael Pettersson <mikpe@it.uu.se>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
When I merged my 20619 new EH conversion with #libata-upstream
I had to manually resolve a conflict, and inadvertently lost
pdc_pata_ops' ->post_internal_cmd binding. Corrected by this patch.
Signed-off-by: Mikael Pettersson <mikpe@it.uu.se>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
All drivers must implement this hook, otherwise ATA commands would go
nowhere (and a lot of other oopsen would appear as well).
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Separate sata_vsc interrupt handling into a normal (per-port) path and an
error path with the addition of vsc_port_intr and vsc_error_intr
respectively. The error path handles interrupt based
hotplug events which requires the definition of vsc_freeze and vsc_thaw.
Note: vsc_port_intr has a workaround for unexpected interrupts that occur
during polled commands. This fixes a regression between 2.6.19 and 2.6.20.
Changes in take2:
* removed definition of invalid fis bit
* let standard ata-error-handling handle the serror register
* clear all unhandled interrupts
* revert changes to vsc_intr_mask_update (vsc_thaw enables all interrupts)
* use unlikely() for the pci-abort and not-our-interrupt cases in vsc_sata_interrupt
Changes in take3:
* Unify the "add" + "hook-up" patches into this single patch
[htejun@gmail.com: clean up comments and suggestions]
Cc: Jeremy Higdon <jeremy@sgi.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
sata_sil used to trigger HSM error if IRQ occurs during polling
command. This didn't matter because polling wasn't used in sata_sil.
However, as of 2.6.20, all IDENTIFYs are performed by polling and
device detection sometimes fails due to spurious IRQ. This patch
makes sata_sil ignore and clear spurious IRQ while executing commands
by polling.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
intx should be turned on when pci_enable_msi() fails not when it
succeeds. Fix it.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
80c test mask is at bits 18 and 19 of EIDE Controller Configuration
not 22 and 23. Fix it.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Duplicate ids noticed by Kay Sievers <kay.sievers@suse.de>
Although 100% different, this is based on a patch by Greg Kroah-Hartman
<gregkh@suse.de>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Recently Tejun wrote a patch to ahci.c to make it raise a HSM violation
if the drive attempted to complete a tag that wasn't outstanding. We could
run into the same problem with sata_nv ADMA. This adds code to raise a HSM
violation error if the controller gives us a notifier tag that isn't
outstanding, since the drive may be issuing spurious completions.
Signed-off-by: Robert Hancock <hancockr@shaw.ca>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
sata_nv implemented its own copies of the BMDMA helper functions for ADMA,
since the ADMA BMDMA status registers are PIO while the other registers
are MMIO, and this was the only way to handle this previously. Now that
we have iomap support, the standard routines should just work, so use them.
The only thing we need to override as far as ADMA and BMDMA is the
post_internal_cmd callback, where we should only call ata_post_internal_cmd
if we are in port-register mode.
Signed-off-by: Robert Hancock <hancockr@shaw.ca>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Merge order left libata-acpi and pata_scc with remainling usage of
ap->id. Kill superflous id printing and substitute the remaining ones
with ap->print_id.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
SDB FIS containing spurious NCQ completions is a clear protocol
violation. Currently, only some Maxtors with early firmware revisions
are showing this problem. Those firmwares have other NCQ related
problems including buggy NCQ error reporting and occasional lock up
after NCQ errors.
Consider spurious NCQ completions HSM violation and freeze the port
after it. EH will turn off NCQ after this happens several times.
Eventually drives which show this behavior should be blacklisted for
NCQ.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
