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Commit Graph

4 Commits

Author SHA1 Message Date
Haojian Zhuang
df0c382436 [ARM] mmp2: add handling on PMIC IRQ
Since PMIC INT pin is a special pin of CPU, the status of PMIC INT pin needs
to be cleared after PMIC IRQ occured. Now append the clear operation in
irq chip handler.

Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-03-02 07:40:57 +08:00
Haojian Zhuang
16144bfb83 [ARM] mmp2: add gpio initialization
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-03-02 07:40:56 +08:00
Haojian Zhuang
247b4592f3 [ARM] mmp2: add mfpr setting
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-03-02 07:40:56 +08:00
Haojian Zhuang
2f7e8faef5 [ARM] mmp: add support for Marvell MMP2
Marvell MMP2 (aka ARMADA610) is a SoC based on PJ4 core. It's
ARMv6 compatible.  Support basic interrupt handler and timer,
and basic support for MMP2 based FLINT platform.

Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-03-02 07:40:55 +08:00