This fixes a memory corruption when ASoC devices are used in
full-duplex mode. Specifically for pxa-ssp code, where this pointer
is dynamically allocated for each direction and destroyed upon each
stream start.
All other platforms are fixed blindly, I couldn't even compile-test
them. Sorry for any breakage I may have caused.
Reported-by: Sven Neumann <s.neumann@raumfeld.com>
Reported-by: Michael Hirsch <m.hirsch@raumfeld.com>
Signed-off-by: Daniel Mack <daniel@caiaq.de>
Acked-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Acked-by: Jarkko Nikula <jhnikula@gmail.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Towards having build for multiple SoCs segregate hw_params callback
for s3c2412 and s3c64xx.
Since, all new SoCs have s3c64xx like register map, we keep that as
default implementation if no SoC specific callback is already defined.
Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
For some CPU-CODEC and source clock combination we might need to set
BCLK to N*Sample_size*LRCLK, where N may be even 3 or 4, not just 2.
We can simply remove the dependency of BCLK on sample size as there
is already a callback(S3C_I2SV2_DIV_BCLK) available to set required BCLK.
Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Towards generalizing CPU driver interface, do not accept direct field
values for the BCLK and RCLK.
The machine driver should simply request the FS-multiple and not provide
the value to be set in divide field of IISMOD.
[Confirmed by Jassi that no existing machine drivers are affected --
broonie]
Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
In order for the RATE and FMT defines to be reuseable in future by the
i2sv4 driver, move the MACROs out to the header file.
Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Rather than having the multiple definitions of the same clocks,
define them in one common place and refer by SoC specific names.
Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Report the current FIFO depth when delay is queried. The FIFO is only
16 frames deep so the latency will be at most a couple of miliseconds
(and we tend to end up reporting zero most of the time) but it may
help some applications.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
String constants that are continued on subsequent lines with \
are not good.
Signed-off-by: Joe Perches <joe@perches.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
It's more robust when references are provided in control names
rather than numid.
Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
The board supports both GPIO sets for the AC97 bus and the analogue
outputs can be switched between this and the WM8580 so add some
comments saying what the setup the standard kernel expects is.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Since, we have generic AC97 controller driver and all the machines
have moved to that, there is no need for old s3c2443-ac97.c to exist.
Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Switch to use s3c-ac97.c AC97 controller driver.
Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Switch to use s3c-ac97.c AC97 controller driver.
Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
This patch adds the common machine driver for SMDKs that
have a WM9713 codec attched to the AC97 controller.
Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Add the AC97 controller driver for Samsung SoCs that have one.
Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
The driver can be 'generalized' a bit by not hardcoding '2'(the number of
I2Sv3 controllers that the driver can handle) at many places, instead we
define a macro for it. That makes it easier to increase number of controllers
by changing the parameter at just one place, this will be useful when there is
support for newer SoCs, which have the same controller, only more in number.
Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Removed redundant header includes which make no difference to compilation.
Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Making room for namespace for the PCM Controller driver
the platform driver(s3c24xx-pcm) has been renamed to SoC
agnostic name 's3c-dma'.
Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Acked-by: Ben Dooks <ben-linux@fluff.org>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
The s3c24xx_pcm prefix for the soc_platform is inappropriate when
some Samsung SoCs have PCM controllers which will eventually have
drivers and hence namespace ambiguities.
To resolve naming ambiguities in future the following have been
renamed in order
1) s3c24xx_pcm_dma_params -> s3c_dma_params
2) s3c24xx_pcm_preallocate_dma_buffer -> s3c_preallocate_dma_buffer
3) s3c24xx_pcm_dmamask -> s3c_dma_mask
4) s3c24xx_pcm_XXX -> s3c_dma_XXX
Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Acked-by: Ben Dooks <ben-linux@fluff.org>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Corrected the order of 'source' and 'pll_id' arguments.
Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Added the missing clk_enable after acquiring the 'audio-bus' clock.
Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Fix up some comments, remove all enable_pin() calls (edge widgets
are all enabled by default) and mark the microphone as disabled by
default since it requires a resistor fit to connect it.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
The S3C64XX DMA implementation will work a lot better with the ability
to enqueue circular buffers as the hardware can do it's own linked-list
management.
Add a function s3c_dma_has_circular() to show that the system can do this
and a flag for the channel.
Update the s3c24xx/s3c64xx I2S DMA code to deal with this.
Signed-off-by: Ben Dooks <ben@simtec.co.uk>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Acked-by: Mark Brown <broonie@@opensource.wolfsonmicro.com>
Remove the <plat/audio.h> include from arch/arm/plat-s3c/include/plat/audio.h
as it provides nothing to the current kernel and is not in any future plans
for the system.
Signed-off-by: Ben Dooks <ben@simtec.co.uk>
Signed-off-by: Simtec Linux Team <linux@simtec.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Fix the missing argument of snd_soc_dai_set_pll() in neo1973_*.c,
which was forgotten in the commit 85488037bb.
Signed-off-by: Takashi Iwai <tiwai@suse.de>
New machine driver for WM8580 I2S i/f on SMDK64XX.
By default SoC-Slave is set and WM8580 is configured to use it's
PLLA to generate clocks from a 12MHz crystal attached to WM8580.
[Added dependency on BROKEN since the IISv4 interface hasn't been merged
yet, fixed the PLL API usage and removed the disabling of the PLL in the
hw_free function since that'll break simultaneous playback and record
-- broonie.]
Signed-off-by: Jassi <jassi.brar@samsung.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Instead of always returnig pointer to the 'audio-bus' clock,
check which clock is used to generate internal clocks and
then return it's pointer.
Signed-off-by: Jassi <jassi.brar@samsung.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
CDCLK can either be an output generated by the CPU, intended for use
as the CODEC master clock, or an input (probably from the CODEC)
providing a master clock for the IIS block.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
1) Explicitly set LRCLK polarity for I2S Vs LSM/MSB modes.
2) Convert from numerical to bit-field values for BCLK selection.
3) Use proper error checking for return value from clk_get
Signed-off-by: Jassi <jassi.brar@samsung.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
s3c2412_snd_lrsync() maybe reached with IRQs disabled and if LRCLK
is dead due to improper initialization of CPU or CODEC, the system
gets stuck in the loop because jiffies may never get updated.
Implemented counter based wait mechanism for atleast the same
timeout period.
Signed-off-by: Jassi <jassi.brar@samsung.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (257 commits)
[ARM] Update mach-types
ARM: 5636/1: Move vendor enum to AMBA include
ARM: Fix pfn_valid() for sparse memory
[ARM] orion5x: Add LaCie NAS 2Big Network support
[ARM] pxa/sharpsl_pm: zaurus c3000 aka spitz: fix resume
ARM: 5686/1: at91: Correct AC97 reset line in at91sam9263ek board
ARM: 5640/1: This patch modifies the support of AC97 on the at91sam9263 ek board
ARM: 5689/1: Update default config of HP Jornada 700-series machines
ARM: 5691/1: fix cache aliasing issues between kmap() and kmap_atomic() with highmem
ARM: 5688/1: ks8695_serial: disable_irq() lockup
ARM: 5687/1: fix an oops with highmem
ARM: 5684/1: Add nuc960 platform to w90x900
ARM: 5683/1: Add nuc950 platform to w90x900
ARM: 5682/1: Add cpu.c and dev.c and modify some files of w90p910 platform
ARM: 5626/1: add suspend/resume functions to amba-pl011 serial driver
ARM: 5625/1: fix hard coded 4K resource size in amba bus detection
MMC: MMCI: convert realview MMC to use gpiolib
ARM: 5685/1: Make MMCI driver compile without gpiolib
ARM: implement highpte
ARM: Show FIQ in /proc/interrupts on CONFIG_FIQ
...
Fix up trivial conflict in arch/arm/kernel/signal.c.
It was due to the TIF_NOTIFY_RESUME addition in commit d0420c83f ("KEYS:
Extend TIF_NOTIFY_RESUME to (almost) all architectures") and follow-ups.
More and more devices feature PLLs and FLLs with the ability to select
between multiple input clocks. In order to better support these devices
a new argument, source, has been added to the set_pll() configuration
API. Using set_clkdiv() is often difficult due to the need to stop the
PLL/FLL before any reconfiguration can be done.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
No point in building them for S3C64xx, certainly no sense in running
into build issues there.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
s3c24xx dma has the auto reload feature, when the the trnasfer is done,
CURR_TC(DSTAT[19:0], current value of transfer count) reaches 0, and DMA
ACK becomes 1, and then, TC(DCON[19:0]) will be loaded into CURR_TC. So
the transmission is repeated.
IRQ is issued while auto reload occurs. We change the DISRC and
DCON[19:0] in the ISR, but at this time, the auto reload has been
performed already. The first block is being re-transmitted by the DMA.
So we need rewrite the DISRC and DCON[19:0] for the next block
immediatly after the this block has been started to be transported.
The function s3c2410_dma_started() is for this perpose, which is called
in the form of "s3c2410_dma_ctrl(prtd->params->channel,
S3C2410_DMAOP_STARTED);" in s3c24xx_pcm_trigger().
But it is not correct. DMA transmission won't start until DMA REQ signal
arrived, it is the time s3c24xx_snd_txctrl(1) or s3c24xx_snd_rxctrl(1)
is called in s3c24xx_i2s_trigger().
In the current framework, s3c24xx_pcm_trigger() is always called before
s3c24xx_pcm_trigger(). So the s3c2410_dma_started() should be called in
s3c24xx_pcm_trigger() after s3c24xx_snd_txctrl(1) or
s3c24xx_snd_rxctrl(1) is called in this function.
However, s3c2410_dma_started() is dma related, to call this function we
should provide the channel number, which is given by
substream->runtime->private_data->params->channel. The private_data
points to a struct s3c24xx_runtime_data object, which is define in
s3c24xx_pcm.c, so s3c2410_dma_started() can't be called in s3c24xx_i2s.c
Fix this by moving the call to signal the DMA started to the DAI
drivers.
Signed-off-by: Shine Liu <liuxian@redflag-linux.com>
Signed-off-by: Shine Liu <shinel@foxmail.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
