2 Commits

Author	SHA1	Message	Date
Rajendra Nayak	56ef28acf1	OMAP4: PRCM: Define shift macros as n instead of 1 << n ... The macros defining the shift bits in registers for various register bit fields are defined as 1 << n. Instead define them as n. They can then be used as val << n. The changes are generated by updating the script which autogenerates the files modifed in the patch. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>	2010-01-29 10:14:22 -07:00
Rajendra Nayak	dd7084138f	ARM: OMAP4: PM: Adds CM1/2 register field masks ... This patch adds OMAP4 specific CM1 and CM2 module register field masks. Auto generated using a python script (gen_cm_shifts_and_mask.py) developed by Benoit Cousson, Paul Walmsley and Rajendra Nayak. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Benoit Cousson <b-cousson@ti.com>	2009-12-11 17:00:45 -07:00