7998df0b64
3496 Commits
Author | SHA1 | Message | Date | |
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Linus Torvalds
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bb41fe35dc |
Char/Misc and other driver subsystem updates for 6.9-rc1
Here is the big set of char/misc and a number of other driver subsystem updates for 6.9-rc1. Included in here are: - IIO driver updates, loads of new ones and evolution of existing ones - coresight driver updates - const cleanups for many driver subsystems - speakup driver additions - platform remove callback void cleanups - mei driver updates - mhi driver updates - cdx driver updates for MSI interrupt handling - nvmem driver updates - other smaller driver updates and cleanups, full details in the shortlog All of these have been in linux-next for a long time with no reported issue, other than a build warning with some older versions of gcc for a speakup driver, fix for that will come in a few days when I catch up with my pending patch queues. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> -----BEGIN PGP SIGNATURE----- iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCZfwuLg8cZ3JlZ0Brcm9h aC5jb20ACgkQMUfUDdst+ynKVACgjvR1cD8NYk9PcGWc9ZaXAZ6zSnwAn260kMoe lLFtwszo7m0N6ZULBWBd =y3yz -----END PGP SIGNATURE----- Merge tag 'char-misc-6.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc Pull char/misc and other driver subsystem updates from Greg KH: "Here is the big set of char/misc and a number of other driver subsystem updates for 6.9-rc1. Included in here are: - IIO driver updates, loads of new ones and evolution of existing ones - coresight driver updates - const cleanups for many driver subsystems - speakup driver additions - platform remove callback void cleanups - mei driver updates - mhi driver updates - cdx driver updates for MSI interrupt handling - nvmem driver updates - other smaller driver updates and cleanups, full details in the shortlog All of these have been in linux-next for a long time with no reported issue, other than a build warning for the speakup driver" The build warning hits clang and is a gcc (and C23) extension, and is fixed up in the merge. Link: https://lore.kernel.org/all/20240321134831.GA2762840@dev-arch.thelio-3990X/ * tag 'char-misc-6.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (279 commits) binder: remove redundant variable page_addr uio_dmem_genirq: UIO_MEM_DMA_COHERENT conversion uio_pruss: UIO_MEM_DMA_COHERENT conversion cnic,bnx2,bnx2x: use UIO_MEM_DMA_COHERENT uio: introduce UIO_MEM_DMA_COHERENT type cdx: add MSI support for CDX bus pps: use cflags-y instead of EXTRA_CFLAGS speakup: Add /dev/synthu device speakup: Fix 8bit characters from direct synth parport: sunbpp: Convert to platform remove callback returning void parport: amiga: Convert to platform remove callback returning void char: xillybus: Convert to platform remove callback returning void vmw_balloon: change maintainership MAINTAINERS: change the maintainer for hpilo driver char: xilinx_hwicap: Fix NULL vs IS_ERR() bug hpet: remove hpets::hp_clocksource platform: goldfish: move the separate 'default' propery for CONFIG_GOLDFISH char: xilinx_hwicap: drop casting to void in dev_set_drvdata greybus: move is_gb_* functions out of greybus.h greybus: Remove usage of the deprecated ida_simple_xx() API ... |
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Linus Torvalds
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78c3925c04 |
ARM: late SoC changes for 6.9
These are changes that for some reason ended up not making it into the first four branches but that should still make it into 6.9: - A rework of the omap clock support that touches both drivers and device tree files - The reset controller branch changes that had a dependency on late bugfixes. Merging them here avoids a backmerge of 6.8-rc5 into the drivers branch - The RISC-V/starfive, RISC-V/microchip and ARM/Broadcom devicetree changes that got delayed and needed some extra time in linux-next for wider testing. -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmX5vYcACgkQYKtH/8kJ UiemkhAAu2lYNpttx+qVlEzQvPKyID5Y+E0cVRmM5e79/fOumNomSzFwtKztCbz2 PV1CHwmDYANKsI8tl91PAe8PzD+9Er+8xa6YYVSMG5bLC2aGdF4k5hzMnRmfhlDe uRT/9iNH0w+S1p44+wXI9Y++uZhxJtCqa6kytxybl6YrG2/l3Wm0PVcMAD/MWT1l OULRg5gv3+7qHLKE0ffd0J7I7zCvKA5cEqnieGSO8+k1jsOE3BvgLttfPUuUsi3x 8yWAJ2cEv293Cao8x8rw39TYIHQOznLMNzK/GCIemL4k9TafbGbuVPUGQZ6oX1SQ +/biiUV8CMLzanw2Ds7piQ/4J8EoJjh7jCf9pETORlHLaCMQaYUk4I2KnBWmjxuO QBy6Py68EkyT1zv7YFkpdxeABkwkrObMmVsjfyltd2lCF6oC+xbIw5IOVPgnUiTc WANL3y+hS5zv+ABmpkRhDPe9KrcoO95sJgGaoMPatwD1/2JkdV7EkvbXWdnipb1w REYk4xuRlJcAgyjc5nrQXR8FuPX63c08NFkOw+AInFV8ipyH+8nkesb0w54aegsR Tihhl0WUxk/e9FLFVlPiYRNdyqOb2HKteRwRxsA1LqqcWdpYjplBrkZhHb3+ESnP lQaQ7AtZRoIjwsImYen3M2W1cFS214BAqoonLLYSd0ponCB05Ng= =IzoE -----END PGP SIGNATURE----- Merge tag 'soc-late-6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull more ARM SoC updates from Arnd Bergmann: "These are changes that for some reason ended up not making it into the first four branches but that should still make it into 6.9: - A rework of the omap clock support that touches both drivers and device tree files - The reset controller branch changes that had a dependency on late bugfixes. Merging them here avoids a backmerge of 6.8-rc5 into the drivers branch - The RISC-V/starfive, RISC-V/microchip and ARM/Broadcom devicetree changes that got delayed and needed some extra time in linux-next for wider testing" * tag 'soc-late-6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (31 commits) soc: fsl: dpio: fix kcalloc() argument order bus: ts-nbus: Improve error reporting bus: ts-nbus: Convert to atomic pwm API riscv: dts: starfive: jh7110: Add camera subsystem nodes ARM: bcm: stop selecing CONFIG_TICK_ONESHOT ARM: dts: omap3: Update clksel clocks to use reg instead of ti,bit-shift ARM: dts: am3: Update clksel clocks to use reg instead of ti,bit-shift clk: ti: Improve clksel clock bit parsing for reg property clk: ti: Handle possible address in the node name dt-bindings: pwm: opencores: Add compatible for StarFive JH8100 dt-bindings: riscv: cpus: reg matches hart ID reset: Instantiate reset GPIO controller for shared reset-gpios reset: gpio: Add GPIO-based reset controller cpufreq: do not open-code of_phandle_args_equal() of: Add of_phandle_args_equal() helper reset: simple: add support for Sophgo SG2042 dt-bindings: reset: sophgo: support SG2042 riscv: dts: microchip: add specific compatible for mpfs pdma riscv: dts: microchip: add missing CAN bus clocks ARM: brcmstb: Add debug UART entry for 74165 ... |
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Linus Torvalds
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ab522e1478 |
Devicetree updates for v6.9:
DT core: - Add cleanup.h based auto release of struct device_node pointers via __free marking and new for_each_child_of_node_scoped() iterator to use it. - Always create a base skeleton DT when CONFIG_OF is enabled. This supports several usecases of adding DT data on non-DT booted systems. - Move around some /reserved-memory code in preparation for further improvements - Add a stub for_each_property_of_node() for !OF - Adjust the printk levels on some messages - Fix __be32 sparse warning - Drop RESERVEDMEM_OF_DECLARE usage from Freescale qbman driver (currently orphaned) - Add Saravana Kannan and drop Frank Rowand as DT maintainers DT bindings: - Convert Mediatek timer, Mediatek sysirq, fsl,imx6ul-tsc, fsl,imx6ul-pinctrl, Atmel AIC, Atmel HLCDC, FPGA region, and xlnx,sd-fec to DT schemas - Add existing, but undocumented fsl,imx-anatop binding - Add bunch of undocumented vendor prefixes used in compatible strings - Drop obsolete brcm,bcm2835-pm-wdt binding - Drop obsolete i2c.txt which as been replaced with schema in dtschema - Add DPS310 device and sort trivial-devices.yaml - Enable undocumented compatible checks on DT binding examples - More QCom maintainer fixes/updates - Updates to writing-schema.rst and DT submitting-patches.rst to cover some frequent review comments - Clean-up SPDX tags to use 'OR' rather than 'or' -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEktVUI4SxYhzZyEuo+vtdtY28YcMFAmX0foEACgkQ+vtdtY28 YcOkUg//T5Q+ZudVn/oJGre3crfPU4O/RHbG+brbwpBZEdiwTGlIjI8ceThjumCO MY25yRewCIZtS8MLlRb/lNPUjQxPeyYWnpO3KZHbOJhU8bJCl2M5P0CQOYJNp0fl fMFhFU5bKVoXyK6y3qx7ivZTXSBCz9KzB1HxY3LueMHVgWiO1Oi++XjLfcos86Mh 7dKZKNbpcnBFkXiESMksQS+asZkoRtZloFg4iFjniSLa8AgYJLsZXd7iW4s0IXy+ Xj+5IcIRcPv2xQoXfCvlcKMheJyePDA1coYpO8pmOYOpjCQzsCnnbzoNERW6hc9u 0DF2IWnq9WLlQ8RVijbECRPgwW6zuU+aklUZLz2q0AiwCVySHaMdC9iYe+KK/7GH m0F21x5mpfK0LVfOMWLsmuqKWn9J164VAeTY9zHqcWuvCohD5ulftvQgRBEiSDtv V3l668t6v67iMkYa8SncbuMkV/NSShWPGne+yP3smvL0pe0P0MJYb1XSstlbNXuK whTDaCydEHx3JPJ6VS/1aJnELFm+uZVl8wjhfrgbWo2hIC83qjN3k0yV+vFNdFzT 5PUfI858fvgYOrGsswYCCJXmb/s37NImCnIF/sjqvj50BA468261KYAFtapa2Vlj uvpKgIZHJEDOK6TPlk5n7+aaOwoLMYzm+yov/0gyRpRKqsXu52U= =YzNN -----END PGP SIGNATURE----- Merge tag 'devicetree-for-6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull devicetree updates from Rob Herring: "DT core: - Add cleanup.h based auto release of struct device_node pointers via __free marking and new for_each_child_of_node_scoped() iterator to use it. - Always create a base skeleton DT when CONFIG_OF is enabled. This supports several usecases of adding DT data on non-DT booted systems. - Move around some /reserved-memory code in preparation for further improvements - Add a stub for_each_property_of_node() for !OF - Adjust the printk levels on some messages - Fix __be32 sparse warning - Drop RESERVEDMEM_OF_DECLARE usage from Freescale qbman driver (currently orphaned) - Add Saravana Kannan and drop Frank Rowand as DT maintainers DT bindings: - Convert Mediatek timer, Mediatek sysirq, fsl,imx6ul-tsc, fsl,imx6ul-pinctrl, Atmel AIC, Atmel HLCDC, FPGA region, and xlnx,sd-fec to DT schemas - Add existing, but undocumented fsl,imx-anatop binding - Add bunch of undocumented vendor prefixes used in compatible strings - Drop obsolete brcm,bcm2835-pm-wdt binding - Drop obsolete i2c.txt which as been replaced with schema in dtschema - Add DPS310 device and sort trivial-devices.yaml - Enable undocumented compatible checks on DT binding examples - More QCom maintainer fixes/updates - Updates to writing-schema.rst and DT submitting-patches.rst to cover some frequent review comments - Clean-up SPDX tags to use 'OR' rather than 'or'" * tag 'devicetree-for-6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (56 commits) dt-bindings: soc: imx: fsl,imx-anatop: add imx6q regulators of: unittest: Use for_each_child_of_node_scoped() of: Introduce for_each_*_child_of_node_scoped() to automate of_node_put() handling of: Add cleanup.h based auto release via __free(device_node) markings of: Move all FDT reserved-memory handling into of_reserved_mem.c of: Add KUnit test to confirm DTB is loaded of: unittest: treat missing of_root as error instead of fixing up x86/of: Unconditionally call unflatten_and_copy_device_tree() um: Unconditionally call unflatten_device_tree() of: Create of_root if no dtb provided by firmware of: Always unflatten in unflatten_and_copy_device_tree() dt-bindings: timer: mediatek: Convert to json-schema dt-bindings: interrupt-controller: fsl,intmux: Include power-domains support soc: fsl: qbman: Remove RESERVEDMEM_OF_DECLARE usage dt-bindings: fsl-imx-sdma: fix HDMI audio index dt-bindings: soc: imx: fsl,imx-iomuxc-gpr: add imx6 dt-bindings: soc: imx: fsl,imx-anatop: add binding dt-bindings: input: touchscreen: fsl,imx6ul-tsc convert to YAML dt-bindings: pinctrl: fsl,imx6ul-pinctrl: convert to YAML of: make for_each_property_of_node() available to to !OF ... |
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Linus Torvalds
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6dff52b828 |
Not a ton of stuff happening in the clk framework in this pull request. We got
some more devm helpers and we seem to be going in the direction of "just turn this stuff on already and leave me alone!" with the addition of a devm_clk_bulk_get_all_enable() API. I'm hoping that we can make that into a genpd that drivers attach instead, but this API should help drivers simplify in the meantime. Outside of the devm wrappers, we've got the usual clk driver updates that are dominated by the major phone SoC vendors (Samsung and Qualcomm) and the non-critical driver fixes for things like incorrect topology descriptions and wrong registers or bit fields. More details are below, but I'd say that it looks pretty ordinary. The only thing that really jumps out at me is the Renesas clk driver that's ignoring clks that are assigned to remote processors in DeviceTree. That's a new feature that they're using to avoid marking clks as CLK_IGNORE_UNUSED based on the configuration of the system. Core: - Increase dev_id len for clkdev lookups - Add a devm_clk_bulk_get_all_enable() API to get and enable all clks for a device - Add a devm variant of clk_rate_exclusive_get() New Drivers: - Display, TCSR, GPU, and Camera clock controllers for Qualcomm's X1 Elite SoC - Google GS101 PERIC0 and PERIC1 clock controllers - Exynos850 PDMA clocks - Exynos850 CPU cluster 0 and 1 (CMU_CPUCLK0/CMU_CPUCLK1) clock controllers Removed Drivers: - Remove the unused Qualcomm sc7180 modem clk driver Updates: - Fix some static checker errors in the Hisilicon clk driver - Polarfire MSSPLL hardware has 4 output clocks (the driver supported previously only one output); each of these 4 outputs feed dividers and the output of each divider feed individual hardware blocks (e.g. CAN, Crypto, eMMC); individual hardware block drivers need to control their clocks thus clock driver support was added for all MSSPLL output clocks - Typo fixes in the Qualcomm IPQ5018 GCC driver - Add "qdss_at" clk on Qualcomm IPQ6018, needed for WiFi - Properly terminate frequency tables in different Qualcomm clk drivers - Add MDSS, crypto, and SDCC resets on Qualcomm MSM8953 - Add missing UFS CLKREF clks on Qualcomm SC8180X - Avoid significant delays during boot by adding a softdep on rpmhpd to Qualcomm SDM845 gcc driver - Add QUPv3 RCGS w/ DFS and video resets to Qualcomm SM8150 GCC driver - Fix the custom GPU GX "do-nothing" method in the Qualcomm GDSC driver - Add an external regulator to GX GDSC on Qualcomm SC8280XP GPU clk driver - Switch display, GPU, video, and camera Qualcomm clk drivers to module_platform_driver() - Set a longer delay for Venus resets on many Qualcomm SoCs - Correct the GDSC wait times in the Qualcomm SDM845 display clk driver - Fix clock listing Oops on Amlogic axg - New pll-rate for Rockchip rk3568 - i2s rate improvements for Rockchip rk3399 - Rockchip rk3588 syscon clock fixes and removal of overall clock-number from the rk3588 binding header - A prerequisite for later improvements to the Rockchip rk3588 linked clocks - Minor clean-ups and error handling improvements in both composite-8m and SCU i.MX clock drivers - Fix for SAI_MCLK_SEL definition for i.MX8MP - Register the Samsung CMU MISC clock controller earlier, so the Multi Core Timer clocksource can use it on Google GS101 - Propagate Exynos850 SPI IPCLK rate change to parents, so the SPI will get proper clock rates - Refactor the generic Samsung CPU clock controllers code, preparing it for supporting Exynos850 CPU clocks - Fix some clk kerneldoc warnings - Add Ethernet, SDHI, DMA, and HyperFLASH/QSPI (RPC-IF) clocks on Renesas R-Car V4M - Ignore all clocks which are assigned to a non-Linux system in the Renesas clk driver - Add watchdog clock on Renesas RZ/G3S - Add camera (CRU) clock and reset on Renesas RZ/G2UL - Add support for the Renesas R-Car V4M (R8A779H0) SoC - Convert some clk bindings to YAML so they can be validated -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmXzUpURHHNib3lkQGtl cm5lbC5vcmcACgkQrQKIl8bklSXEvQ/+K0Llv6Jgs/VJkg086qE7z82KvIQRUasi Rhxtq8P9DS4KYBd1BB0Wwsrh2CyW9ZWUn0unQ1ZtbxCHKE1lweYb4UkafNamRynT cKlXR5wGNtbHUF6Gmdjw+lkuF6pxj3ZcmV47bQyhLMctndWn434sIn3gpv2pTYF2 Q/ZwhhiS2ZQU1hdpgHwe9iIRJ7QcGlWKyhRx9m5QSRIL7eZFiUvBcYNAdoSa1ovr FZOSUAUaxxDu16VrC8mPjaMQ3lDqz8DVSw3i1cDsMdYHbBidzlNLzBH9L+qFgXng cYqYR3dlJ6HuXr9wwwe5X3Pm01VZ6Askl16h9tUnZgtZuSuxMPeWMw2brZZPNFOn L0SvHdLFj4MzyhgXWtQughttzdOwaRP9lNZNZwchMU5aEU0e3GDeBUBeJ0CRAAqD DHRYQW3vDlIG4mhrr54GgQ5XjeHqj9W5OrGU/dWmBp+/e1wB3MB47UJf0GJ7F9kA BNvMFtk9hRJkmqsKY93mWpKOe3su2Fl/1vlhK9Tw5V8h/GzBnEsVDUNRYaRaN+wd gYTEo73T2FJ4OSYncRDeSPXTmKeI2+4sa1XJKx8rasEZNOR2V3DH/8bMXZhjSbzL nZDh+eu0uyS6+xVReE6349ivSPyNDEXO0IbI7yq7jjSYB+LxW49O2xMeoYuNSjtz RxKHQr0skqs= =rRIa -----END PGP SIGNATURE----- Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk updates from Stephen Boyd: "Not a ton of stuff happening in the clk framework. We got some more devm helpers and we seem to be going in the direction of "just turn this stuff on already and leave me alone!" with the addition of a devm_clk_bulk_get_all_enable() API. I'm hoping that we can make that into a pmdomain that drivers attach instead, but this API should help drivers simplify in the meantime. Outside of the devm wrappers, we've got the usual clk driver updates that are dominated by the major phone SoC vendors (Samsung and Qualcomm) and the non-critical driver fixes for things like incorrect topology descriptions and wrong registers or bit fields. More details are below, but I'd say that it looks pretty ordinary. The only thing that really jumps out at me is the Renesas clk driver that's ignoring clks that are assigned to remote processors in DeviceTree. That's a new feature that they're using to avoid marking clks as CLK_IGNORE_UNUSED based on the configuration of the system. Core: - Increase dev_id len for clkdev lookups - Add a devm_clk_bulk_get_all_enable() API to get and enable all clks for a device - Add a devm variant of clk_rate_exclusive_get() New Drivers: - Display, TCSR, GPU, and Camera clock controllers for Qualcomm's X1 Elite SoC - Google GS101 PERIC0 and PERIC1 clock controllers - Exynos850 PDMA clocks - Exynos850 CPU cluster 0 and 1 (CMU_CPUCLK0/CMU_CPUCLK1) clock controllers Removed Drivers: - Remove the unused Qualcomm sc7180 modem clk driver Updates: - Fix some static checker errors in the Hisilicon clk driver - Polarfire MSSPLL hardware has 4 output clocks (the driver supported previously only one output); each of these 4 outputs feed dividers and the output of each divider feed individual hardware blocks (e.g. CAN, Crypto, eMMC); individual hardware block drivers need to control their clocks thus clock driver support was added for all MSSPLL output clocks - Typo fixes in the Qualcomm IPQ5018 GCC driver - Add "qdss_at" clk on Qualcomm IPQ6018, needed for WiFi - Properly terminate frequency tables in different Qualcomm clk drivers - Add MDSS, crypto, and SDCC resets on Qualcomm MSM8953 - Add missing UFS CLKREF clks on Qualcomm SC8180X - Avoid significant delays during boot by adding a softdep on rpmhpd to Qualcomm SDM845 gcc driver - Add QUPv3 RCGS w/ DFS and video resets to Qualcomm SM8150 GCC driver - Fix the custom GPU GX "do-nothing" method in the Qualcomm GDSC driver - Add an external regulator to GX GDSC on Qualcomm SC8280XP GPU clk driver - Switch display, GPU, video, and camera Qualcomm clk drivers to module_platform_driver() - Set a longer delay for Venus resets on many Qualcomm SoCs - Correct the GDSC wait times in the Qualcomm SDM845 display clk driver - Fix clock listing Oops on Amlogic axg - New pll-rate for Rockchip rk3568 - i2s rate improvements for Rockchip rk3399 - Rockchip rk3588 syscon clock fixes and removal of overall clock-number from the rk3588 binding header - A prerequisite for later improvements to the Rockchip rk3588 linked clocks - Minor clean-ups and error handling improvements in both composite-8m and SCU i.MX clock drivers - Fix for SAI_MCLK_SEL definition for i.MX8MP - Register the Samsung CMU MISC clock controller earlier, so the Multi Core Timer clocksource can use it on Google GS101 - Propagate Exynos850 SPI IPCLK rate change to parents, so the SPI will get proper clock rates - Refactor the generic Samsung CPU clock controllers code, preparing it for supporting Exynos850 CPU clocks - Fix some clk kerneldoc warnings - Add Ethernet, SDHI, DMA, and HyperFLASH/QSPI (RPC-IF) clocks on Renesas R-Car V4M - Ignore all clocks which are assigned to a non-Linux system in the Renesas clk driver - Add watchdog clock on Renesas RZ/G3S - Add camera (CRU) clock and reset on Renesas RZ/G2UL - Add support for the Renesas R-Car V4M (R8A779H0) SoC - Convert some clk bindings to YAML so they can be validated" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (150 commits) clk: zynq: Prevent null pointer dereference caused by kmalloc failure clk: fractional-divider: Use bit operations consistently clk: fractional-divider: Move mask calculations out of lock clk: Fix clk_core_get NULL dereference clk: starfive: jh7110-vout: Convert to platform remove callback returning void clk: starfive: jh7110-isp: Convert to platform remove callback returning void clk: imx: imx8-acm: Convert to platform remove callback returning void clk: qcom: gcc-ipq5018: fix register offset for GCC_UBI0_AXI_ARES reset clk: qcom: gcc-ipq5018: fix 'halt_reg' offset of 'gcc_pcie1_pipe_clk' clk: qcom: gcc-ipq5018: fix 'enable_reg' offset of 'gcc_gmac0_sys_clk' clk: qcom: camcc-x1e80100: Fix missing DT_IFACE enum in x1e80100 camcc clk: qcom: mmcc-msm8974: fix terminating of frequency table arrays clk: qcom: mmcc-apq8084: fix terminating of frequency table arrays clk: qcom: camcc-sc8280xp: fix terminating of frequency table arrays clk: qcom: gcc-ipq9574: fix terminating of frequency table arrays clk: qcom: gcc-ipq8074: fix terminating of frequency table arrays clk: qcom: gcc-ipq6018: fix terminating of frequency table arrays clk: qcom: gcc-ipq5018: fix terminating of frequency table arrays clk: mediatek: clk-mt8173-apmixedsys: Use common error handling code in clk_mt8173_apmixed_probe() clk: Add a devm variant of clk_rate_exclusive_get() ... |
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Linus Torvalds
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f5c31bcf60 |
- Core Frameworks
- Introduce ExpressWire library - New Drivers - Add support for ON Semiconductor NCP5623 RGB LED Driver - New Device Support - Add support for PM660L to Qualcomm's LPG driver - New Functionality - Dynamically load modules required for the default-trigger - Add some support for suspend and resume - Allow LEDs to remain lit during suspend - Fix-ups - Device Tree binding adaptions/conversions/creation - Fix include lists; alphabetise, remove unused, explicitly add used - Add new led_match_default_trigger to avoid duplication - Add module alias' to aid auto-loading - Default to hw_control if no others are specified - De-bloat the supported link speed attribute lists - Remove superfluous code and simplify overall - Constify some variables - Bug Fixes - Prevent kernel panic when renaming the net interface - Fix Kconfig related build errors - Ensure mutexes are unlocked prior to destroying them - Provide clean-up between state changes to avoid invalid state - Fix some broken kernel-doc headers -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEdrbJNaO+IJqU8IdIUa+KL4f8d2EFAmXzCvUACgkQUa+KL4f8 d2Fh0A/+KQiuzluglEsnyG7gfb2771x9dQ9pIwaR68UkCwThNH8ico+NqUDs8Jur 6jtfYfKcWIz3i5kbnWBDGJfEEiVuDGu8Zv9UFxzQViyWQqawkJWNMsYqL3KtfI4i Ujj2Ja1MsoqO7COngry9I+3sT6rEwdQJMrVfNAdvOYjlXwr3O8Z2NipPACEqutUr 0gxKAEEbGOj3+s3UGInrGi9RGuOVBe9UNA2etmtie1kxkdowTxCNY94ukUf9tnvC WVXF8iOByUgVAxMh1ugSc27CTCV+VcDMYKKr9ABVhskI/pT3zMFoUCYY1EqhaOTF Q40+yFX8ERomNTgy1tbNf06PkzaN+NJ4P/SHFU79madfy4OM6QobpTSt7bBpaSEP gm3zuI1a353NPfAUZiIsTgv8jCh18w/adphTNsXY/4PnmkKF0+Pm57PJf8BDhlY3 KiScK7WXhGS9G3wNpLH+7QBdWiON3oWYJhVK4ijEfgRpEDofv+W16GzcETkUsyQ1 5DLu/W8wHN9zxHj1YXaitmnRjX3IMoltcIix8FI3YUKrx3m3twm2Vj5ZLziaPm83 7rBBPyePXwIamLokiTPCfXOxygO7Qv6VAp1aCR6400R/rtjykziboqvT2o6OMpkS W/88631VIuL9jAaP/zdUHrle1NpKDiHs2MF0Rtj+0OOoMJyOC7k= =m2vY -----END PGP SIGNATURE----- Merge tag 'leds-next-6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/leds Pull LED updates from Lee Jones: "Core Framework: - Introduce ExpressWire library New Drivers: - Add support for ON Semiconductor NCP5623 RGB LED Driver New Device Support: - Add support for PM660L to Qualcomm's LPG driver New Functionality: - Dynamically load modules required for the default-trigger - Add some support for suspend and resume - Allow LEDs to remain lit during suspend Fix-ups: - Device Tree binding adaptions/conversions/creation - Fix include lists; alphabetise, remove unused, explicitly add used - Add new led_match_default_trigger to avoid duplication - Add module alias' to aid auto-loading - Default to hw_control if no others are specified - De-bloat the supported link speed attribute lists - Remove superfluous code and simplify overall - Constify some variables Bug Fixes: - Prevent kernel panic when renaming the net interface - Fix Kconfig related build errors - Ensure mutexes are unlocked prior to destroying them - Provide clean-up between state changes to avoid invalid state - Fix some broken kernel-doc headers" * tag 'leds-next-6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/leds: (41 commits) leds: ncp5623: Add MS suffix to time defines leds: Add NCP5623 multi-led driver dt-bindings: leds: Add NCP5623 multi-LED Controller leds: mlxreg: Drop an excess struct mlxreg_led_data member leds: leds-mlxcpld: Fix struct mlxcpld_led_priv member name leds: lm3601x: Fix struct lm3601_led kernel-doc warnings leds: Fix ifdef check for gpio_led_register_device() dt-bindings: leds: qcom-lpg: Narrow nvmem for other variants dt-bindings: leds: qcom-lpg: Drop redundant qcom,pm8550-pwm in if:then: dt-bindings: leds: Add LED_FUNCTION_WAN_ONLINE for Internet access leds: sgm3140: Add missing timer cleanup and flash gpio control leds: expresswire: Don't depend on NEW_LEDS Revert "leds: Only descend into leds directory when CONFIG_NEW_LEDS is set" leds: aw2013: Unlock mutex before destroying it leds: qcom-lpg: Add QCOM_PBS dependency leds: rgb: leds-group-multicolor: Allow LEDs to stay on in suspend leds: trigger: netdev: Fix kernel panic on interface rename trig notify leds: qcom-lpg: Add PM660L configuration and compatible leds: spi-byte: Use devm_led_classdev_register_ext() leds: pca963x: Add support for suspend and resume ... |
||
Stephen Boyd
|
3066c521be |
Merge branches 'clk-samsung', 'clk-imx', 'clk-rockchip', 'clk-clkdev' and 'clk-rate-exclusive' into clk-next
- Increase dev_id len for clkdev lookups * clk-samsung: (25 commits) clk: samsung: Add CPU clock support for Exynos850 clk: samsung: Pass mask to wait_until_mux_stable() clk: samsung: Keep register offsets in chip specific structure clk: samsung: Keep CPU clock chip specific data in a dedicated struct clk: samsung: Pass register layout type explicitly to CLK_CPU() clk: samsung: Pass actual CPU clock registers base to CPU_CLK() clk: samsung: Group CPU clock functions by chip clk: samsung: Use single CPU clock notifier callback for all chips clk: samsung: Reduce params count in exynos_register_cpu_clock() clk: samsung: Pull struct exynos_cpuclk into clk-cpu.c clk: samsung: Improve clk-cpu.c style dt-bindings: clock: exynos850: Add CMU_CPUCLK0 and CMU_CPUCL1 clk: samsung: gs101: add support for cmu_peric1 clk: samsung: gs101: drop extra empty line dt-bindings: clock: google,gs101-clock: add PERIC1 clock management unit clk: samsung: exynos850: Propagate SPI IPCLK rate change clk: samsung: gs101: gpio_peric0_pclk needs to be kept on clk: samsung: exynos850: Add PDMA clocks dt-bindings: clock: tesla,fsd: Fix spelling mistake clk: samsung: gs101: add support for cmu_peric0 ... * clk-imx: clk: imx: imx8mp: Fix SAI_MCLK_SEL definition clk: imx: scu: Use common error handling code in imx_clk_scu_alloc_dev() clk: imx: composite-8m: Delete two unnecessary initialisations in __imx8m_clk_hw_composite() clk: imx: composite-8m: Less function calls in __imx8m_clk_hw_composite() after error detection * clk-rockchip: clk: rockchip: rk3399: Allow to set rate of clk_i2s0_frac's parent clk: rockchip: rk3588: use linked clock ID for GATE_LINK clk: rockchip: rk3588: fix indent clk: rockchip: rk3588: fix pclk_vo0grf and pclk_vo1grf dt-bindings: clock: rk3588: add missing PCLK_VO1GRF dt-bindings: clock: rk3588: drop CLK_NR_CLKS clk: rockchip: rk3588: fix CLK_NR_CLKS usage clk: rockchip: rk3568: Add PLL rate for 128MHz * clk-clkdev: clkdev: Update clkdev id usage to allow for longer names * clk-rate-exclusive: clk: Add a devm variant of clk_rate_exclusive_get() |
||
Stephen Boyd
|
68e4ebd542 |
Merge branches 'clk-remove', 'clk-amlogic', 'clk-qcom', 'clk-parent' and 'clk-microchip' into clk-next
* clk-remove: clk: starfive: jh7110-vout: Convert to platform remove callback returning void clk: starfive: jh7110-isp: Convert to platform remove callback returning void clk: imx: imx8-acm: Convert to platform remove callback returning void * clk-amlogic: clk: meson: Add missing clocks to axg_clk_regmaps * clk-qcom: (62 commits) clk: qcom: gcc-ipq5018: fix register offset for GCC_UBI0_AXI_ARES reset clk: qcom: gcc-ipq5018: fix 'halt_reg' offset of 'gcc_pcie1_pipe_clk' clk: qcom: gcc-ipq5018: fix 'enable_reg' offset of 'gcc_gmac0_sys_clk' clk: qcom: camcc-x1e80100: Fix missing DT_IFACE enum in x1e80100 camcc clk: qcom: mmcc-msm8974: fix terminating of frequency table arrays clk: qcom: mmcc-apq8084: fix terminating of frequency table arrays clk: qcom: camcc-sc8280xp: fix terminating of frequency table arrays clk: qcom: gcc-ipq9574: fix terminating of frequency table arrays clk: qcom: gcc-ipq8074: fix terminating of frequency table arrays clk: qcom: gcc-ipq6018: fix terminating of frequency table arrays clk: qcom: gcc-ipq5018: fix terminating of frequency table arrays clk: qcom: dispcc-sdm845: Adjust internal GDSC wait times dt-bindings: clk: qcom: drop the SC7180 Modem subsystem clock controller clk: qcom: drop the SC7180 Modem subsystem clock driver clk: qcom: Use qcom_branch_set_clk_en() clk: qcom: branch: Add a helper for setting the enable bit clk: qcom: dispcc-sm8250: Make clk_init_data and pll_vco const clk: qcom: gcc-sc8180x: Add missing UFS QREF clocks clk: qcom: gcc-msm8953: add more resets clk: qcom: videocc-*: switch to module_platform_driver ... * clk-parent: clk: Fix clk_core_get NULL dereference * clk-microchip: clk: microchip: mpfs: convert MSSPLL outputs to clk_divider clk: microchip: mpfs: add missing MSSPLL outputs clk: microchip: mpfs: setup for using other mss pll outputs clk: microchip: mpfs: split MSSPLL in two dt-bindings: can: mpfs: add missing required clock dt-bindings: clock: mpfs: add more MSSPLL output definitions |
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Stephen Boyd
|
ee2d2a4e9c |
Merge branches 'clk-aspeed', 'clk-keystone', 'clk-mobileye' and 'clk-allwinner' into clk-next
* clk-aspeed: clk: ast2600: Add FSI parent clock with correct rate dt-bindings: clock: ast2600: Add FSI clock * clk-keystone: clk: keystone: sci-clk: Adding support for non contiguous clocks * clk-mobileye: dt-bindings: reset: mobileye,eyeq5-reset: add bindings dt-bindings: clock: mobileye,eyeq5-clk: add bindings clk: fixed-factor: add fwname-based constructor functions clk: fixed-factor: add optional accuracy support * clk-allwinner: clk: sunxi: usb: fix kernel-doc warnings clk: sunxi: sun9i-cpus: fix kernel-doc warnings clk: sunxi: a20-gmac: fix kernel-doc warnings |
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Stephen Boyd
|
cf5f06c8ee |
Merge branches 'clk-renesas', 'clk-cleanup', 'clk-hisilicon', 'clk-mediatek' and 'clk-bulk' into clk-next
- Add a devm_clk_bulk_get_all_enable() API to get and enable all clks for a device - Fix some static checker errors in the hisilicon clk driver * clk-renesas: (25 commits) clk: renesas: r8a779h0: Add RPC-IF clock clk: renesas: r8a779h0: Add SYS-DMAC clocks clk: renesas: r8a779h0: Add SDHI clock clk: renesas: r8a779h0: Add EtherAVB clocks clk: renesas: r9a07g04[34]: Fix typo for sel_shdi variable clk: renesas: r9a07g04[34]: Use SEL_SDHI1_STS status configuration for SD1 mux clk: renesas: r8a779f0: Correct PFC/GPIO parent clock clk: renesas: r8a779g0: Correct PFC/GPIO parent clocks clk: renesas: r8a779h0: Add I2C clocks clk: renesas: r8a779h0: Add watchdog clock clk: renesas: r8a779h0: Add PFC/GPIO clocks clk: renesas: r8a779g0: Fix PCIe clock name clk: renesas: cpg-mssr: Add support for R-Car V4M clk: renesas: rcar-gen4: Add support for FRQCRC1 clk: renesas: r9a07g043: Add clock and reset entries for CRU clk: renesas: r9a08g045: Add clock and reset support for watchdog dt-bindings: clock: Add R8A779H0 V4M CPG Core Clock Definitions dt-bindings: clock: renesas,cpg-mssr: Document R-Car V4M support dt-bindings: power: Add r8a779h0 SYSC power domain definitions dt-bindings: power: renesas,rcar-sysc: Document R-Car V4M support ... * clk-cleanup: clk: zynq: Prevent null pointer dereference caused by kmalloc failure clk: fractional-divider: Use bit operations consistently clk: fractional-divider: Move mask calculations out of lock clk: ti: dpll3xxx: use correct function names in kernel-doc clk: clocking-wizard: Remove redundant initialization of pointer div_addr clk: keystone: sci-clk: match func name comment to actual clk: cdce925: Remove redundant assignment to variable 'rate' MAINTAINERS: drop Sekhar Nori * clk-hisilicon: clk: hisilicon: Use devm_kcalloc() instead of devm_kzalloc() clk: hisilicon: hi3559a: Fix an erroneous devm_kfree() clk: hisilicon: hi3519: Release the correct number of gates in hi3519_clk_unregister() * clk-mediatek: clk: mediatek: clk-mt8173-apmixedsys: Use common error handling code in clk_mt8173_apmixed_probe() clk: mediatek: add infracfg reset controller for mt7988 dt-bindings: reset: mediatek: add MT7988 infracfg reset IDs dt-bindings: clock: mediatek: convert SSUSBSYS to the json-schema clock dt-bindings: clock: mediatek: convert PCIESYS to the json-schema clock dt-bindings: clock: mediatek: convert hifsys to the json-schema clock clk: mediatek: mt7981-topckgen: flag SGM_REG_SEL as critical clk: mediatek: mt8183: Correct parent of CLK_INFRA_SSPM_32K_SELF clk: mediatek: mt7622-apmixedsys: Fix an error handling path in clk_mt8135_apmixed_probe() clk: mediatek: mt8135: Fix an error handling path in clk_mt8135_apmixed_probe() * clk-bulk: clk: Provide managed helper to get and enable bulk clocks |
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Linus Torvalds
|
a070a08d00 |
Core:
- Log a message when unused PM domains gets disabled - Scale down parent/child performance states in the reverse order Providers: - qcom: rpmpd: Add power domains support for MSM8974, MSM8974PRO, PMA8084 and PM8841 - renesas: rcar-gen4-sysc: Reduce atomic delays - renesas: rcar-sysc: Adjust the waiting time to cover the worst case - renesas: r8a779h0-sysc: Add support for the r8a779h0 PM domains - imx: imx8mp-blk-ctrl: Add the fdcc clock to the hdmimix domains - imx: imx8mp-blk-ctrl: Error out if domains are missing in DT Improve support for multiple PM domains: - Add two helper functions to attach/detach multiple PM domains - Convert a couple of drivers to use the new helper functions -----BEGIN PGP SIGNATURE----- iQJLBAABCgA1FiEEugLDXPmKSktSkQsV/iaEJXNYjCkFAmXvJJIXHHVsZi5oYW5z c29uQGxpbmFyby5vcmcACgkQ/iaEJXNYjClQDQ/+JNgDl9Kq0hTid2wWyL498flc bB7kuaIdjkConPUNZ5gP0usirOGoGomHuCP4X5Ms2tWf/ZODkFDoyRhDK2sYUhlY wN7msCaQdMbaXXu+uglsxOKttu7N4lbJ1TwgMNgDiwt5CYirJa7GpRH96/3sIW2B vf8hADeWKZsuJ/2ikLPB4WFOHio5/HxqDp6zq2yCnw4rwG4zF209V3JAx/mMcUhd hXxxhBNVcqngqP8oJUvg6eKY6pWlRnPLvQOOMUFEgxtoCEUda3pw+SXO2JVUgI1x x81FneC2kPSu7/kg9G9hjWfRHs3j3eXz4fXn9C8yPvla0DFDT0jbgnJOqSZBQMd8 4vOLaaeEcVArYg60VC13ez+vldUGAtSfcclzEPOmqQH+cihkbPeRvpve4c0YJkGy kEv2/fIFIJdDBxlg9vrTCczQnaYxou5jYiMkSBec1HBPnntwqQ2ji1hx3n1C+LwQ 0AAQMldz+57oJlhso0iWDwidPairn6NprscaEINiOHdRKyrOJGr7s5vQaXy23bIc U7XHJLZ5cho4YECymLd7oyh30HyPz0Ya4E+NE0pf/Dj8ZZOpiUYnvs4sQuxhX9Fi i/3/cbyZrdSy4bQ2ld1sQV4BM+eYVAOT9l4zNFXbdhMpAjpAbSiStaEHrczhrnGI Fc9BvaDowjufngzhgd8= =KslH -----END PGP SIGNATURE----- Merge tag 'pmdomain-v6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/linux-pm Pull pmdomain updates from Ulf Hansson: "Core: - Log a message when unused PM domains gets disabled - Scale down parent/child performance states in the reverse order Providers: - qcom: rpmpd: Add power domains support for MSM8974, MSM8974PRO, PMA8084 and PM8841 - renesas: rcar-gen4-sysc: Reduce atomic delays - renesas: rcar-sysc: Adjust the waiting time to cover the worst case - renesas: r8a779h0-sysc: Add support for the r8a779h0 PM domains - imx: imx8mp-blk-ctrl: Add the fdcc clock to the hdmimix domains - imx: imx8mp-blk-ctrl: Error out if domains are missing in DT Improve support for multiple PM domains: - Add two helper functions to attach/detach multiple PM domains - Convert a couple of drivers to use the new helper functions" * tag 'pmdomain-v6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/linux-pm: (22 commits) pmdomain: renesas: rcar-gen4-sysc: Reduce atomic delays pmdomain: renesas: Adjust the waiting time to cover the worst case pmdomain: qcom: rpmpd: Add MSM8974PRO+PMA8084 power domains pmdomain: qcom: rpmpd: Add MSM8974+PM8841 power domains pmdomain: core: constify of_phandle_args in add device and subdomain pmdomain: core: constify of_phandle_args in xlate media: venus: Convert to dev_pm_domain_attach|detach_list() for vcodec remoteproc: qcom_q6v5_adsp: Convert to dev_pm_domain_attach|detach_list() remoteproc: imx_rproc: Convert to dev_pm_domain_attach|detach_list() remoteproc: imx_dsp_rproc: Convert to dev_pm_domain_attach|detach_list() PM: domains: Add helper functions to attach/detach multiple PM domains pmdomain: imx8mp-blk-ctrl: imx8mp_blk: Add fdcc clock to hdmimix domain pmdomain: mediatek: Use devm_platform_ioremap_resource() in init_scp() pmdomain: renesas: r8a779h0-sysc: Add r8a779h0 support pmdomain: imx8mp-blk-ctrl: Error out if domains are missing in DT pmdomain: ti: Add a null pointer check to the omap_prm_domain_init pmdomain: renesas: rcar-gen4-sysc: Remove unneeded includes pmdomain: core: Print a message when unused power domains are disabled pmdomain: qcom: rpmpd: Keep one RPM handle for all RPMPDs pmdomain: core: Scale down parent/child performance states in reverse order ... |
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Linus Torvalds
|
2184dbcde4 |
ARM: SoC drivers for 6.9
This is the usual mix of updates for drivers that are used on (mostly ARM) SoCs with no other top-level subsystem tree, including: - The SCMI firmware subsystem gains support for version 3.2 of the specification and updates to the notification code. - Feature updates for Tegra and Qualcomm platforms for added hardware support. - A number of platforms get soc_device additions for identifying newly added chips from Renesas, Qualcomm, Mediatek and Google. - Trivial improvements for firmware and memory drivers amongst others, in particular 'const' annotations throughout multiple subsystems. -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmXvgbsACgkQYKtH/8kJ UieH8Q/+LRzESrScIwFq0/V7lE1AadmhwMwcEf1Fsq8aMrelvPm/SWvHgIWIHTvV IZ/g3XS/CnBxr1JG3nbyMMe/2otEY7JxsUOOqixIuZ2gdzJvzZOBHMi54xDwbFRx 4NbP0CRTy8K35XNnOkJO3TnwBFP+q2Fu6qHY90as8M2GIxQpWb8OONJHh8N2qPq+ Hi3H0jjKXMInnOKpNIEQI60N4F2djGMHWkDySwFtHu40RaJjCIfmVd3PWQGz7RHl WQHjZ6CB+/BDgqfG0ccQ7Cikc4BLorZsjKCn8bsaLtdp4HvRCTp2ZpuFFTRq6vay IxqJCXrgpKjM1k9plehObEhMv4lNMbD1djG8Y6hqC+PPKbDfOLvlcat3xUK2AGgb ROJtKDQMXfAeSnLpw9n4Ox+BZRmwMIOcTU/20N72hlcZKY1jq/KuSqQn+LPVKIrW pJIhWd1B8R+2O1TewuIe3fjvfQwgATMBHBUVNRkSrzqkpcZNGQ3M5koMpClVvY6T Z/+hdAg58EQw0K6ukJLyrevxs1pHHhYXLCECIoU/xPs4NX4hDk7rKTFv6fdLS4Y2 24qzjhIGYdhRXmhRQdVq+06cr3cvtm1z7Fqna3tW1+J6wtBnHO/xZ63M9n5saPcm NgKMAN7YLLMYuUNrd39W7U2wLGQCgknjhrbH8ZmxPypk467v08k= =bV/K -----END PGP SIGNATURE----- Merge tag 'soc-drivers-6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC driver updates from Arnd Bergmann: "This is the usual mix of updates for drivers that are used on (mostly ARM) SoCs with no other top-level subsystem tree, including: - The SCMI firmware subsystem gains support for version 3.2 of the specification and updates to the notification code - Feature updates for Tegra and Qualcomm platforms for added hardware support - A number of platforms get soc_device additions for identifying newly added chips from Renesas, Qualcomm, Mediatek and Google - Trivial improvements for firmware and memory drivers amongst others, in particular 'const' annotations throughout multiple subsystems" * tag 'soc-drivers-6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (96 commits) tee: make tee_bus_type const soc: qcom: aoss: add missing kerneldoc for qmp members soc: qcom: geni-se: drop unused kerneldoc struct geni_wrapper param soc: qcom: spm: fix building with CONFIG_REGULATOR=n bus: ti-sysc: constify the struct device_type usage memory: stm32-fmc2-ebi: keep power domain on memory: stm32-fmc2-ebi: add MP25 RIF support memory: stm32-fmc2-ebi: add MP25 support memory: stm32-fmc2-ebi: check regmap_read return value dt-bindings: memory-controller: st,stm32: add MP25 support dt-bindings: bus: imx-weim: convert to YAML watchdog: s3c2410_wdt: use exynos_get_pmu_regmap_by_phandle() for PMU regs soc: samsung: exynos-pmu: Add regmap support for SoCs that protect PMU regs MAINTAINERS: Update SCMI entry with HWMON driver MAINTAINERS: samsung: gs101: match patches touching Google Tensor SoC memory: tegra: Fix indentation memory: tegra: Add BPMP and ICC info for DLA clients memory: tegra: Correct DLA client names dt-bindings: memory: renesas,rpc-if: Document R-Car V4M support firmware: arm_scmi: Update the supported clock protocol version ... |
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Rafał Miłecki
|
64e558500d |
dt-bindings: leds: Add LED_FUNCTION_WAN_ONLINE for Internet access
It's common for routers to have LED indicating link on the WAN port. Some devices however have an extra LED that's meant to be used if WAN connection is actually "online" (there is Internet access available). It was suggested to add #define for such use case. Link: https://lore.kernel.org/linux-devicetree/80e92209-5578-44e7-bd4b-603a29053ddf@collabora.com/T/#u Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20240223112223.1368-1-zajec5@gmail.com Signed-off-by: Lee Jones <lee@kernel.org> |
||
Rafał Miłecki
|
ec18a2a83b |
dt-bindings: leds: Add FUNCTION defines for per-band WLANs
Most wireless routers and access points can operate in multiple bands simultaneously. Vendors often equip their devices with per-band LEDs. Add defines for those very common functions to allow cleaner & clearer bindings. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20240117151736.27440-1-zajec5@gmail.com Signed-off-by: Lee Jones <lee@kernel.org> |
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Arnd Bergmann
|
b74638bbda |
Initial support for the rk3568 Qnap TS433 NAS, the rk3588-based Tiger SoM
from Theobroma-Systems and the rk3588-based Toybrick TB-RK3588X. Some fixes to conform to dt-bindings for i2s (rk3588, rk356x) and rk356x video-decoder (missing interrupt-names). Correcting the vendor in the compatible for OrangePi RK3399 and BananaPi R2 Pro (discussed with DT-maintainers beforehand of course). The VO1-GRF syscon needs its clock to work, and that clock also needed to be actually exported forst, so we're sharing a branch with the Rockchip clock-tree (that already got merged into the main clock-tree for 6.9) for this small shared code. And as another step on the long road to graphics output on rk3588, 6.9 will get the hdmi-phy via the phy-tree, so here the dts node is added. -----BEGIN PGP SIGNATURE----- iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAmXjFSEQHGhlaWtvQHNu dGVjaC5kZQAKCRDzpnnJnNEdgZ12CACL8EGrdL32f+Yg+4pgKiC79C0WFh05F56I KAgK4nRs3IjOR8zRUx5Wez3uKd7vbH/3GhqSurJQ894FNqpOKYJ48cnokaG/hUV3 dimEr5dPcSZGVdRcaQRH+B7Pe5hFmw98dZxIDfWOZzZ4XwShcfDYFx6xlGmcba+e KyMwjrVHyjh3M384yDx14oJw8bqn2b+oFFaZxCoz93zX9g1FUFbF6IuOsJ0KXXDR SRHP+s2jGxUyBltsXyQc4sa4e9i8hDbAZuBwgozLReSgTy+GJqxj87pcsc/4uCAE w8MW9RW/xwuFrU+BLs0UNOtdSn8BdHjEyEFc0SEtFAW9HVtoCozP =awlr -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmXleR4ACgkQYKtH/8kJ UifN5w//dcJ1v6HXK31S0Egneku8WUV4ytQuLXvYeg41zIIIEv36sBeqDQxd5taa z2/Vy4plHCECvXWjZFEGfK44Hn/0KevrG3rHOzhNUhZV10M1KBHP5uxUYVtrmcYr crZsLGy90ZLnZqdKjep1bSxMv1o5QdU9LUjBZmclZEeMky4CH3ZB+sMY9shN6YZM wWewSwsLSoa2pAxP9g3izJjFKcwALDjNapmuXe/KFWOIOfJrm3kvASu993sfILYA /Wx3IRMerM9tsxAz1/KfKyKYnfT4HbF2RlNTf8OaYdypXU4eLpMboL31k8jCBoTT TNVkY5M722r9rbg5hTM4LTRRuEC4rfuDJEyEdHWEgqPIdXK4pwMncQDBVwimunIN sEG5TajVI34e9ZInptJQ/ZBCKCllC5gpAPcLw9GrRw7guuCfIbpQj0F+2lDFR9Ob FtYW7Ua6Nbw7jPbOCW6qrF/ujnbG3X317aYugpuqiakPW/G+kv11CtRsWZV+OBTv SXgRqtYTKprFJxOY5nMnlkG7+ps/B2ctgOGuq1mjcoodsZDF8WW6q00U9Jf9IbVF f78ed9DOJ+M70NKJ1QLBIXDLhcZ/Mlv2m9akG8YqmVvBs9efRPQc0mnFQUvWiMDq 7xFXZRl2i2xe5IX0JIE7Ujvox/APZARrHhQldHfkC9S5jSlCi0E= =SbMB -----END PGP SIGNATURE----- Merge tag 'v6.9-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt Initial support for the rk3568 Qnap TS433 NAS, the rk3588-based Tiger SoM from Theobroma-Systems and the rk3588-based Toybrick TB-RK3588X. Some fixes to conform to dt-bindings for i2s (rk3588, rk356x) and rk356x video-decoder (missing interrupt-names). Correcting the vendor in the compatible for OrangePi RK3399 and BananaPi R2 Pro (discussed with DT-maintainers beforehand of course). The VO1-GRF syscon needs its clock to work, and that clock also needed to be actually exported forst, so we're sharing a branch with the Rockchip clock-tree (that already got merged into the main clock-tree for 6.9) for this small shared code. And as another step on the long road to graphics output on rk3588, 6.9 will get the hdmi-phy via the phy-tree, so here the dts node is added. * tag 'v6.9-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: arm64: dts: rockchip: Fix name for UART pin header on qnap-ts433 arm64: dts: rockchip: Add basic support for QNAP TS-433 dt-bindings: arm: rockchip: Add QNAP TS-433 arm64: dts: rockchip: add Haikou baseboard with RK3588-Q7 SoM arm64: dts: rockchip: add RK3588-Q7 (Tiger) SoM dt-bindings: arm: rockchip: Add Theobroma-Systems RK3588 Q7 with baseboard arm64: dts: rockchip: drop rockchip,trcm-sync-tx-only from rk3588 i2s arm64: dts: rockchip: fix reset-names for rk356x i2s2 controller arm64: dts: rockchip: add missing interrupt-names for rk356x vdpu arm64: dts: rockchip: add clock to vo1-grf syscon on rk3588 dt-bindings: arm: rockchip: Add Toybrick TB-RK3588X arm64: dts: rockchip: Add devicetree support for TB-RK3588X board arm64: dts: rockchip: adjust vendor on orangepi rk3399 board arm64: dts: rockchip: adjust vendor on Banana Pi R2 Pro board dt-bindings: arm: rockchip: Correct vendor for Banana Pi R2 Pro dt-bindings: arm: rockchip: Correct vendor for Orange Pi RK3399 board arm64: dts: rockchip: Add HDMI0 PHY to rk3588 dt-bindings: clock: rk3588: add missing PCLK_VO1GRF dt-bindings: clock: rk3588: drop CLK_NR_CLKS clk: rockchip: rk3588: fix CLK_NR_CLKS usage Link: https://lore.kernel.org/r/3695004.ElGaqSPkdT@phil Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
|
f011770485 |
STM32 DT for v6.9, round 1
Highlights: ---------- - MCU: - Add DSI support on stm32f769. - Add display support on stm32f769-disco. - Add stm32f769-disco-mb1166-reva09 board support which belongs to the novatek NT35510 panel. - MPU: - STM32MP13: - Add CRC support an enable it on stm32mp135f-dk. - Enable CRYP on stm32mp135f-dk. - STMP32MP15: - Fix DSI peripheral clock: use bus clock instead of kernel clock for pclk. - LXA: driver powerboard lines as open drain. - LXA: reduce RGMII drive strenght to reduce EMI emmissions. - STM32MP25: - Add video encoder / video decoder support. -----BEGIN PGP SIGNATURE----- iQJRBAABCgA7FiEEctl9+nxzUSUqdELdf5rJavIecIUFAmXgVQ8dHGFsZXhhbmRy ZS50b3JndWVAZm9zcy5zdC5jb20ACgkQf5rJavIecIXNVA/+PqcJRmO1aWmj/1HY DSwmCZ9W8kIVuUT1X/oAcb2UwiDOvNNSelAKARs4KWmc54sH7LW7xek7iEes127a xaqdnCShFdHYtqfrVsiPTncRjplNzKrvINvKDdkPvFHp0qgQ7IjwWlkZY2JOssya 9iorKAu846fxD8/1QJUDmnJOpXY4lvl4XczMICw5NKEAV5L6oIf4jiND59h/jd0d 5vYO99wy5f4Gf0uSJSgGPDJxtyJwjff2HaNZJGL5dHstd7VF8gUV/Nvd6rMhaAEv dpkITRnmS7aF3+BBXDM3pa8zVuXwnNd/6w5OWSUJNRL+LQEmeS3aUSJ3BxrsGXtL 75drVHdLhqHtxYrEJlRSWnAUNJMrG/SDN6nfcTPV5F0Mlj8B790K6E9c5YA5iYAH 9yeGaOPj3EcTo2nzfvZMdpuO6Dw0wn3ahzGjBWg24F4QfSqKvfuok0A6FgXQEKvj b98HLiywy3hBZGnupxHzGRFp+LO41o1uVzCMMoSZoXSNH0JIm/3de3lFcpmxlkmG p0/+5scL1f3Jfc9x4D6Xa7pwZOrfZiZ8JM8DOCVEO2LQ5d/p0mcR4zMLVCYS8LQA 6GQseDUR+egEpRpnejIPvWm06CSKBm5PuZLByWPKmkEXMMPQM07wQfMeyIwWJ/cO MGwMoAU2qaerBYlhSb87d2eFJ44= =CSVX -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmXlblUACgkQYKtH/8kJ UieUzw//VkCNYTje/5+dZ19wa9Rw5upL9awkgKvIfzs7lwmVivPRVUHoCpGNSsNc AFHc+AdLFynwowShOR4oMDyT4f50b4+1OXfUXIRI6vDkg42vbqBoMrYrSFqtMJRt RbRaMRm9QrInHzoQzJgKIvq+Jo57TCXuEeE7tPMVhR48h2yB8rlwkP74oEnvVFgl iLtU9ScXZe0dS/inBadKF7tSv57I7FTFMCQ5wSqvwPF3QAT21EaXdp5daE0Vf71f r1Jgy1AAm4JWrMexAtDJCuSx2stYMK7n8VKZBB6AZ4321TFlrIGnY4GGVU5vJXRS X2sfWKK/YHucfSC1w+Mwr8pVGicjZy+4izNDyqDcTivkSohLDsf74UDNZqjzs0gT yvzH1MwIqKHgkcjWo5ZP/Sf2M8DU8L65IwFn9Yf5l7LaEIT9ZZGGLDgosz4gTR2b aRiz5g1S2gsodJgsFQhFFebjtI5cxmnZC9rRxdDMT8KHS8RE2h7WuJt102NkFKNO pReg5RPEcJ6JYoQk/4lBN6L4ls5o8txu1YMeS9uxq5kt8tiejz1ZzT97FfD+yWBg sizT6AW+FojLsWiSeRUtsTjvzfkI0/gCGx8AorzG8nWJCDWSq1qIxUoucqTk0naM vTQDLi4Lf6g2USSwl/cXaaTOVJ8QYVzCbwqwDjgNceReP9FEpkE= =p/sn -----END PGP SIGNATURE----- Merge tag 'stm32-dt-for-v6.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/dt STM32 DT for v6.9, round 1 Highlights: ---------- - MCU: - Add DSI support on stm32f769. - Add display support on stm32f769-disco. - Add stm32f769-disco-mb1166-reva09 board support which belongs to the novatek NT35510 panel. - MPU: - STM32MP13: - Add CRC support an enable it on stm32mp135f-dk. - Enable CRYP on stm32mp135f-dk. - STMP32MP15: - Fix DSI peripheral clock: use bus clock instead of kernel clock for pclk. - LXA: driver powerboard lines as open drain. - LXA: reduce RGMII drive strenght to reduce EMI emmissions. - STM32MP25: - Add video encoder / video decoder support. * tag 'stm32-dt-for-v6.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: arm64: dts: st: add video encoder support to stm32mp255 arm64: dts: st: add video decoder support to stm32mp255 ARM: dts: stm32: enable crypto accelerator on stm32mp135f-dk ARM: dts: stm32: enable CRC on stm32mp135f-dk ARM: dts: stm32: add CRC on stm32mp131 ARM: dts: add stm32f769-disco-mb1166-reva09 ARM: dts: stm32: add display support on stm32f769-disco ARM: dts: stm32: rename mmc_vcard to vcc-3v3 on stm32f769-disco ARM: dts: stm32: add DSI support on stm32f769 dt-bindings: mfd: stm32f7: Add binding definition for DSI dt-bindings: nt35510: document 'port' property ARM: dts: stm32: lxa-tac: reduce RGMII interface drive strength ARM: dts: stm32: fix DSI peripheral clock on stm32mp15 boards ARM: dts: stm32: lxa-tac: drive powerboard lines as open-drain Link: https://lore.kernel.org/r/a7ae1058-e24d-4a6b-900f-401f0e3ae17c@foss.st.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
|
aefe054f2c |
Qualcomm ARM64 DeviceTree updates for v6.9
Four variants of Samsung Galaxy Core Prime and Grand Prime, built on MSM8916, and the Hardware Development Kit (HDK) for SM8550, are introduced. On X Elite audio and compute remoteprocs, IPCC, PCIe, AOSS QMP, SMP2P, TCSR, USB, display, audio, and soundwire support is introduced, and enabled across the CRD and QCP devices. For SM8650 PCIe controllers are moved to GIC-ITS and msi-map-mask is defined. Missing qlink-logging reserved-memory region is added for the modem remoteproc. FastRPC compute contexts are marked dma-coherent. Audio, USB Type-C and PM8010 support is introduced across MTP and QRD devices. GPU cooling devices are hooked up across MSM8916, MSM8939, SC8180X, SDM630, SDM845, SM6115, SM8150, SM8250, SM8350, and SM8550. UFS PHY clocks are corrected across MSM8996, MSM8998, SC8180X, SC8280XP, SDM845, SM6115, SM6125, SM8150, SM8250, SM8350, SM8550, and SM8650. PCI MSI interrupts are wired up across SM8150, SM8250, SM8350, SM8450, SM8550, SM8650, SC7280, and SC8180X On IPQ6018 QUP5 I2C, tsens sand thermal zones are defined. The Inline Crypto Engine (ICE) is enabled for IPQ9574. On MSM8953 the GPU and its IOMMU is introduced, the reset for the display subsystem is also wired up. VLS CLAMP registers are specified for USB3 PHYs on MSM8998, QCM2290, and SM6115. USB Type-C port management is enabled on QRB4210 RB2. On the SA8295P ADP the MAX20411 regulator powering the GPU rails is introduced and the GPU is enabled. The first PCI instance on SA8540P Ride is disabled for now, as a fix for the interrupt storm produced here has not been presented. On SA8775P the firmware memory map has changed and is updated. Safety IRQ is added to the Ethernet controller. On SC7180 UFS support is introduced and the cros-ec-spi is marked as wakeup source. For SC7280 capacity and DPC properties are added, cryptobam definition is improved to work in more firmware environments, more Chrome-specific properties are moved out from main dtsi, and cros-ec-spi is maked as a wakeup source. Slimbus definition is added to the platform. A missing reserved-memory range is added to Fairphone FP5, PMIC GLINK and Venus are enabled. LEDs are introduced and voltage settings corrected on the QCM6490 IDP, and RB3gen2 sees the same voltage changes and GCC protected clocks are introduced to make the board boot properly. RPMh sleep stats and a variety of cleanups and fixes are introduced for SC8180X. On SC8280XP the additional tsens instances are introduced. Camera Subsystem and Camera Control Interface (CCI) are added. PMIC die-temp vadc channels are introduced on the CRD, to allow ADC channels to be tied to the shared PMIC temp-alarms, to actually report temperature. On SDM630 USB QMP PHY support is introduced and enabled on the Inforce IFC6560 board. On the various Sony Xperia XA2 variants WLED is enabled and configured. On SM6350 display subsystem interconnects and tsens-based thermal zones are added. On SM7125 UFS support is added. On Fairphone FP4, on SM7225, display and GPU are enabled, and firmware paths are corrected. SM8150 PCIe controller definitions are corrected. As with SM8650, the SM8550 the fastrpc compute contexts are marked dm-coherent, and PCIe controllers are moved to use GIC-ITS. The UFS controller frequency definition is moved to the generic opp-table. Touchscreen is enabled on the QRD device. As usual, a variety of smaller cleanups and corrections to match DeviceTree bindings and style guidelines are introduced across the various files. -----BEGIN PGP SIGNATURE----- iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmXayZYVHGFuZGVyc3Nv bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FtLcQAJyCQ/wRZ2BVVr3afFqWaAIQQ4+X mTywp/1dtWDbLMew2WIcv1KLHVDynsPWYr/AWM3w0kjgbiqr+EzZl18GVAqf53QB CCkgbLClEKl8NyGQGKWRfp0PF5K/ujv50+6WxwJ+46Sm63odAHe1MZFQQsyuMACn uP7R9yiKt39ztwXp24KbbS6OKNnxtvqeI2OTYFiQV6kR/AqTONrIedqNhvMfgAw9 jOF5ZkqDTlTqJhcszOkzfBC18bnTLvhKP0TG4YhlUpDwJVIaGVp3vzIzX7PJgVIA XxbWqc6I91PIPTHCu4gCcklQXLdu3Uc1cBqufiE70+GgDo4+P4nJkSDNeSrOUuQA NXUULnFyum7U0S3yIQHD2wiUIqRwgwfLJeKe7Z8kya4cCWkcvUBWBw+e8GCADlEI R22pY4bpJwJYO66TCHT/5A05HjnSh/wY1O56fLepJ5ywGQKX7U71mZsGehSgwp4u /OuWgRqnMmcyNAZKE/NMFfGUCRLRWwzWTl4VQ1Fiq+JN3jcySFyAm+cW8NXQ3q6y oDcxx8TyWn+nBS/oErNZ9Q0I7jQun4DzUyYszeBEzffyWPie3KI6KtqlkJGSmK/y Z1kCOnlJSfDNnRYHR82fNFSuHpIpBYhdSWUduweLwiX36ZfFcZ8QA8eTsDANNgf4 TZflGJSXL8YMBucn =LM9R -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmXhqwQACgkQYKtH/8kJ Uie8thAAk7/ASn/Q8PcHAEamCk34HFADaVnUpU6OTtQwiBDr3amRx8IfrGqxbW6e BVZOFnasehDLl68433XrFTQfaRLFxRJEoY5sZ1PFOCZvqoO8IfjawokpjzKzq6PK 0HprU82+CVl9UwYjcAEWD2y/alQ4Q48YUF971q7dzBCTey8gXUZtyW2fk7ZptzR1 utq3rE3zK+WRvijTdHNsjw3qdwoM3K8QrryocKqYqzQM9RKNu2JfJgH1VL+8W70x eZvASON8wYgByaKke5WrK9k1ZGCj01Qy7bfdv/hzz+DZ+KkvvJce+/gy1zB5klzV fP6qSP5BP8zTzaQx/pqK3TDb/QMXNndwmWYufAtQ4LE0c5AwDnd9ZJN29yb4ASME cSUfc0cfrL/JrWlk17FWPo94z9InWBurZg/L8ljS3ms6MWUQcaZjIPrUYz+scAdF dVlJJrX1eJVNj95q/79DfjNeRgMOzj8E5dm/qGDEM/XxQvCLo3pEWAiauIYRkGFE NsG1uZsW833gx3M0ZEtGtP9Nl2Mai5gyZjXFa+P5Of9TQ1/FYWghyn7hmfajGqlJ gQzsBwbJSQv9H40X907NbLE9fULHHfAfTY0SFHaH1U6LmxrGfXpKm44+KKoEABAH Lkx4k8da0ALK+YsYbXtPkd95zdIUx2567GwJaAZg46QKaBAjk9o= =+uiX -----END PGP SIGNATURE----- Merge tag 'qcom-arm64-for-6.9' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt Qualcomm ARM64 DeviceTree updates for v6.9 Four variants of Samsung Galaxy Core Prime and Grand Prime, built on MSM8916, and the Hardware Development Kit (HDK) for SM8550, are introduced. On X Elite audio and compute remoteprocs, IPCC, PCIe, AOSS QMP, SMP2P, TCSR, USB, display, audio, and soundwire support is introduced, and enabled across the CRD and QCP devices. For SM8650 PCIe controllers are moved to GIC-ITS and msi-map-mask is defined. Missing qlink-logging reserved-memory region is added for the modem remoteproc. FastRPC compute contexts are marked dma-coherent. Audio, USB Type-C and PM8010 support is introduced across MTP and QRD devices. GPU cooling devices are hooked up across MSM8916, MSM8939, SC8180X, SDM630, SDM845, SM6115, SM8150, SM8250, SM8350, and SM8550. UFS PHY clocks are corrected across MSM8996, MSM8998, SC8180X, SC8280XP, SDM845, SM6115, SM6125, SM8150, SM8250, SM8350, SM8550, and SM8650. PCI MSI interrupts are wired up across SM8150, SM8250, SM8350, SM8450, SM8550, SM8650, SC7280, and SC8180X On IPQ6018 QUP5 I2C, tsens sand thermal zones are defined. The Inline Crypto Engine (ICE) is enabled for IPQ9574. On MSM8953 the GPU and its IOMMU is introduced, the reset for the display subsystem is also wired up. VLS CLAMP registers are specified for USB3 PHYs on MSM8998, QCM2290, and SM6115. USB Type-C port management is enabled on QRB4210 RB2. On the SA8295P ADP the MAX20411 regulator powering the GPU rails is introduced and the GPU is enabled. The first PCI instance on SA8540P Ride is disabled for now, as a fix for the interrupt storm produced here has not been presented. On SA8775P the firmware memory map has changed and is updated. Safety IRQ is added to the Ethernet controller. On SC7180 UFS support is introduced and the cros-ec-spi is marked as wakeup source. For SC7280 capacity and DPC properties are added, cryptobam definition is improved to work in more firmware environments, more Chrome-specific properties are moved out from main dtsi, and cros-ec-spi is maked as a wakeup source. Slimbus definition is added to the platform. A missing reserved-memory range is added to Fairphone FP5, PMIC GLINK and Venus are enabled. LEDs are introduced and voltage settings corrected on the QCM6490 IDP, and RB3gen2 sees the same voltage changes and GCC protected clocks are introduced to make the board boot properly. RPMh sleep stats and a variety of cleanups and fixes are introduced for SC8180X. On SC8280XP the additional tsens instances are introduced. Camera Subsystem and Camera Control Interface (CCI) are added. PMIC die-temp vadc channels are introduced on the CRD, to allow ADC channels to be tied to the shared PMIC temp-alarms, to actually report temperature. On SDM630 USB QMP PHY support is introduced and enabled on the Inforce IFC6560 board. On the various Sony Xperia XA2 variants WLED is enabled and configured. On SM6350 display subsystem interconnects and tsens-based thermal zones are added. On SM7125 UFS support is added. On Fairphone FP4, on SM7225, display and GPU are enabled, and firmware paths are corrected. SM8150 PCIe controller definitions are corrected. As with SM8650, the SM8550 the fastrpc compute contexts are marked dm-coherent, and PCIe controllers are moved to use GIC-ITS. The UFS controller frequency definition is moved to the generic opp-table. Touchscreen is enabled on the QRD device. As usual, a variety of smaller cleanups and corrections to match DeviceTree bindings and style guidelines are introduced across the various files. * tag 'qcom-arm64-for-6.9' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (176 commits) arm64: dts: qcom: sm6115: fix USB PHY configuration arm64: dts: sm8650: Add msi-map-mask for PCIe nodes arm64: dts: qcom: replace underscores in node names dt-bindings: arm: qcom: Add Samsung Galaxy Tab 4 10.1 LTE arm64: dts: qcom: pm4125: define USB-C related blocks arm64: dts: qcom: sa8540p-ride: disable pcie2a node arm64: dts: qcom: sc7280: add slimbus DT node arm64: dts: qcom: sc7280: Add capacity and DPC properties arm64: dts: qcom: pmi632: Add PBS client and use in LPG node arm64: dts: qcom: sm8550: Use GIC-ITS for PCIe0 and PCIe1 arm64: dts: qcom: sm8150: correct PCIe wake-gpios arm64: dts: qcom: sdm845-db845c: correct PCIe wake-gpios arm64: dts: qcom: sm7225-fairphone-fp4: Enable display and GPU arm64: dts: qcom: sm6350: Remove "disabled" state of GMU arm64: dts: qcom: msm8916-samsung-fortuna/rossa: Add fuel gauge arm64: dts: qcom: sm6350: Add interconnect for MDSS arm64: dts: qcom: msm8916-samsung-fortuna/rossa: Add initial device trees arm64: dts: qcom: sm8550: Switch UFS from opp-table-hz to opp-v2 arm64: dts: qcom: sc8180x: describe all PCI MSI interrupts arm64: dts: qcom: minor whitespace cleanup ... Link: https://lore.kernel.org/r/20240225050146.484422-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Georgi Djakov
|
d1c1649113 |
Merge branch 'icc-sm7150' into icc-next
Add dt-bindings and interconnect driver support for the Qualcomm SM7150 SoC. * icc-sm7150 dt-bindings: interconnect: Add Qualcomm SM7150 DT bindings interconnect: qcom: Add SM7150 driver support Link: https://lore.kernel.org/r/20240222174250.80493-1-danila@jiaxyga.com Signed-off-by: Georgi Djakov <djakov@kernel.org> |
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Danila Tikhonov
|
9c4058493b |
dt-bindings: interconnect: Add Qualcomm SM7150 DT bindings
The Qualcomm SM7150 platform has several bus fabrics that could be controlled and tuned dynamically according to the bandwidth demand. Signed-off-by: Danila Tikhonov <danila@jiaxyga.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240222174250.80493-2-danila@jiaxyga.com Signed-off-by: Georgi Djakov <djakov@kernel.org> |
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Arnd Bergmann
|
1422eb8585 |
Samsung DTS ARM64 changes for v6.9
Mostly work around Google GS101 SoC and Pixel phone (Oriole) adding support for: 1. Multi Core Timer (MCT) clocksource. 2. Several clock controllers (DTS and DT bindings) and use new clocks in several other device nodes. 3. More serial-interface instances: USI8 and USI12 with I2C. Exynos850: 1. SPI and DMA controllers (PL330). -----BEGIN PGP SIGNATURE----- iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmXSSV8QHGtyemtAa2Vy bmVsLm9yZwAKCRDBN2bmhouD1xrKD/sHdEhe+Ry7KJs4TanYYHDJUq7I1x5K7xYd M1A1TAsdU+YegESN9JSxYO+p/zCmjvlS3yeoWSEKFokRUDxNQNZeCVN2tGeRQvzK uZyj1D6n31taDAA6zVneeZ7Xn3C5Zh0eNMy3+j6ZhqeTyW85ECdxEN+KwbrQ324r 00+9FUH42RYNqXF8pxAMmWEEwtzdwzeQ+dU7RkcL4LZaY3HOsesX0ZxHzprVpzOo vQYtwoLcQ1Q4sEPOYNtDflUv33y8vfX04BUnXliNHBmgHT7XGRk35vfAnDjGEmBr UiDkLFs1xlaTjJCOSqmto8cQToRvX58DSEBBtGO4jPe/F1ZxYTyYymSB1ygDlz+a hSRRdlS5MeeV2kc1yO1uXMAI5UfNM1zXbV3fsuWjquXki/kdl7l5uj/3/UL8Jgvf j9G6MuNFCUcho6uXtgEf9G5FsEIW6yBtoCoSX/izIM/5o3wUy0u9DT6hnjIjnemN L0dahtgyrSPDKAh9yoAWhlkcs5em0LN8bPi9tLCuVAEhmcgiqlHyK9tFzwQkIJGa 7Eq9jx2BDFJADCPXD9jWDhsNyHMZZOwK41TuSFH6i3EgLlwpUfN1TbGfUrgw5iAx hT7t0ecaN8xJYOb7xI6f8fO0qDYHqcxSon5b1iKr2w+7t4XLEEEMrq6B0uLsCZib PcBFBYsm0A== =Qz5k -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmXgnmwACgkQYKtH/8kJ Uidu5A//Q7tpYouP0tKMESalkZoKYx32hCMs7ldp1TRZ11M2RxWKvxdayMiW7WNG 8/YMOJ74VyFjVdQp7uO9V3d2brHjX4SzUucD+UX2cHSdg7ccfMuVnUo6xEtKvxX9 OQPZwZ8iG9jQmi5MtxNqdP8c+7lk+SScVFzdZ0rJWL/OBGdTtFFct9lrXZg8Wctg dXBiiqBiZnBWQIvkGm5zbdM+u6/8lQuISa7xSgJfIiTEqtgR6Y5pByGpTrGVeFMW sCdkVFOnz4v5whNkkRPxZy1IJhkW2OqSooReIuPqo0zqcEnFEEKQfoifZWarvXqr wpyk6prVDi8698ebUTacyHKoaMtraXC7AVEQiEobjR136ZdTBR+Eze4fCzQJQTs4 cAcjD49qbJJPgarM8z/zU+VUa4PQfN1x2TRrvx/8BdqXd0nACxLWrHuRwgtKgfIK 1Ytycw3FnNUrBZ1mARWX+LmZzypzcPJ5bbn6BUxdV+w6m3lwbos3SoyFzLyO3k5W r6dr++vNBWLJYHkia6i0Ft/YnbUMmRe2UrfibFvaS8LJSCxQkobfDTWpvFeA8k8q cqZWc+bBQ3CZxat7DD3L4aFBwAnlFFokoKf8M6JVBFfyxpiikZFBfK+xcD7uR8oV SzbyJY2g44xoGEbVAub7fe4QH6xcgpj3mSJDnHqkzRks8jf7Jcs= =KV1f -----END PGP SIGNATURE----- Merge tag 'samsung-dt64-6.9' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt Samsung DTS ARM64 changes for v6.9 Mostly work around Google GS101 SoC and Pixel phone (Oriole) adding support for: 1. Multi Core Timer (MCT) clocksource. 2. Several clock controllers (DTS and DT bindings) and use new clocks in several other device nodes. 3. More serial-interface instances: USI8 and USI12 with I2C. Exynos850: 1. SPI and DMA controllers (PL330). * tag 'samsung-dt64-6.9' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: arm64: dts: fsd: Add fifosize for UART in Device Tree arm64: dts: exynos: gs101: minor whitespace cleanup arm64: dts: exynos: gs101: enable i2c bus 12 on gs101-oriole arm64: dts: exynos: gs101: define USI12 with I2C configuration arm64: dts: exynos: gs101: enable cmu-peric1 clock controller dt-bindings: clock: google,gs101-clock: add PERIC1 clock management unit arm64: dts: exynos: Add SPI nodes for Exynos850 arm64: dts: exynos: Add PDMA node for Exynos850 arm64: dts: exynos: gs101: use correct clocks for usi_uart arm64: dts: exynos: gs101: use correct clocks for usi8 arm64: dts: exynos: gs101: sysreg_peric0 needs a clock arm64: dts: exynos: gs101: enable eeprom on gs101-oriole arm64: dts: exynos: gs101: define USI8 with I2C configuration arm64: dts: exynos: gs101: update USI UART to use peric0 clocks arm64: dts: exynos: gs101: enable cmu-peric0 clock controller arm64: dts: exynos: gs101: remove reg-io-width from serial arm64: dts: exynos: gs101: define Multi Core Timer (MCT) node dt-bindings: clock: exynos850: Add PDMA clocks dt-bindings: clock: google,gs101-clock: add PERIC0 clock management unit Link: https://lore.kernel.org/r/20240218182141.31213-2-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Dario Binacchi
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55e963738a |
dt-bindings: mfd: stm32f7: Add binding definition for DSI
Add binding definition for MIPI DSI Host controller. Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Acked-by: Lee Jones <lee@kernel.org> Reviewed-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> |
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Sebastian Reichel
|
c81798cf9d |
dt-bindings: clock: rk3588: add missing PCLK_VO1GRF
Add PCLK_VO1GRF to complement PCLK_VO0GRF. This will be needed for HDMI support. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20240126182919.48402-4-sebastian.reichel@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de> |
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Sebastian Reichel
|
11a29dc2e4 |
dt-bindings: clock: rk3588: drop CLK_NR_CLKS
CLK_NR_CLKS should not be part of the binding. Let's drop it, since the kernel code no longer uses it either. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20240126182919.48402-3-sebastian.reichel@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de> |
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Georgi Djakov
|
6025a81ae6 |
Merge branch 'icc-cleanup' into icc-next
* icc-cleanup interconnect: qcom: sm8550: Remove bogus per-RSC BCMs and nodes dt-bindings: interconnect: Remove bogus interconnect nodes interconnect: qcom: x1e80100: Remove bogus per-RSC BCMs and nodes interconnect: qcom: sa8775p: constify pointer to qcom_icc_node interconnect: qcom: sm8250: constify pointer to qcom_icc_node interconnect: qcom: sm6115: constify pointer to qcom_icc_node interconnect: qcom: sa8775p: constify pointer to qcom_icc_bcm interconnect: qcom: x1e80100: constify pointer to qcom_icc_bcm dt-bindings: interconnect: qcom,rpmh: Fix bouncing @codeaurora address interconnect: constify of_phandle_args in xlate Signed-off-by: Georgi Djakov <djakov@kernel.org> |
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Sam Protsenko
|
76dedb9c0b |
dt-bindings: clock: exynos850: Add CMU_CPUCLK0 and CMU_CPUCL1
Document CPU clock management unit compatibles and add corresponding clock indices. Exynos850 has two CPU clusters (CL0 and CL1), each containing 4 Cortex-A55 cores. CPU PLLs are generating main CPU clocks for each cluster, and there are alternate ("switch") clocks that can be used temporarily while re-configuring the PLL for the new rate. ACLK, ATCLK, PCLKDBG and PERIPHCLK clocks are driving corresponding buses. CLK_CLUSTERx_SCLK are actual leaf CPU clocks and should be used to change CPU rates. Also some CoreSight clocks can be derived from DBG_USER (debug clock). Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Link: https://lore.kernel.org/r/20240224202053.25313-2-semen.protsenko@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
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Théo Lebrun
|
4a85e82658 |
dt-bindings: clock: mobileye,eyeq5-clk: add bindings
Add DT schema bindings for the EyeQ5 clock controller driver. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com> Link: https://lore.kernel.org/r/20240221-mbly-clk-v7-3-31d4ce3630c3@bootlin.com Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Eddie James
|
692678b69c |
dt-bindings: clock: ast2600: Add FSI clock
Add a definition for the FSI clock. Signed-off-by: Eddie James <eajames@linux.ibm.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240215220759.976998-2-eajames@linux.ibm.com Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Frank Wunderlich
|
c9d9bea92c |
dt-bindings: reset: mediatek: add MT7988 infracfg reset IDs
Add reset constants for using as index in driver and dts. Value is starting again from 0 because resets are used in another device than existing constants. Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20240201182409.39878-2-linux@fw-web.de Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Chen Wang
|
41197eb5f9 |
dt-bindings: reset: sophgo: support SG2042
Add bindings for the reset generator on the SOPHGO SG2042 RISC-V SoC. Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Inochi Amaoto <inochiama@outlook.com> Link: https://lore.kernel.org/r/35c348437b6e18972ccaf90d9c38040caccd1f11.1706577450.git.unicorn_wang@outlook.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> |
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Danila Tikhonov
|
307b7d8f70 |
dt-bindings: arm: qcom,ids: Add IDs for SM8475 family
Add Qualcomm SM8475/SM8475P/SM8475_2 (cape) SoC IDs. Signed-off-by: Danila Tikhonov <danila@jiaxyga.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240212201428.87151-2-danila@jiaxyga.com Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
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Krzysztof Kozlowski
|
6e71647145 |
dt-bindings: use capital "OR" for multiple licenses in SPDX
Documentation/process/license-rules.rst and checkpatch expect the SPDX identifier syntax for multiple licenses to use capital "OR". Correct it to keep consistent format and avoid copy-paste issues. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240208105327.129159-1-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring <robh@kernel.org> |
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Geert Uytterhoeven
|
abb3fa662b |
clk: renesas: r8a779g0: Correct PFC/GPIO parent clocks
According to the R-Car V4H Series Hardware User’s Manual Rev.1.00, the parent clock of the Pin Function (PFC/GPIO) module clocks is the CP clock. Fix this by adding the missing CP clock, and correcting the PFC parents. Fixes: |
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Luca Weiss
|
05d1039503 |
dt-bindings: power: rpmpd: Add MSM8974 power domains
Add the compatibles and indexes for the rpmpd in MSM8974, both with the standard PM8841+PM8941 PMICs but also devices found with PMA8084. Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240210-msm8974-rpmpd-v2-1-595e2ff80ea1@z3ntu.xyz Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> |
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Bjorn Andersson
|
286ffaafa6 |
Merge branch '20240131-ufs-phy-clock-v3-3-58a49d2f4605@linaro.org' into clk-for-6.9
Merge the two SC8180X reset defines through a topic branch, to allow them being picked up in the DeviceTree source tree as well. |
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Bjorn Andersson
|
d3b2afb925 |
Merge branch '20240125-msm8953-mdss-reset-v2-1-fd7824559426@z3ntu.xyz' into clk-for-6.9
Merge MSM8953 GCC DeviceTree binding update through topic branch, to allow it to be merged into DeviceTree source tree as well. |
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André Draszik
|
455061eb32 |
dt-bindings: clock: google,gs101-clock: add PERIC1 clock management unit
Add dt-schema documentation and clock IDs for the Connectivity Peripheral 1 (PERIC1) clock management unit. Signed-off-by: André Draszik <andre.draszik@linaro.org> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Peter Griffin <peter.griffin@linaro.org> Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20240201161258.1013664-3-andre.draszik@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
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Bjorn Andersson
|
cc2bc7a7ab |
Merge branch '20240131-ufs-phy-clock-v3-3-58a49d2f4605@linaro.org' into HEAD
Merge clock topic branch that introduces the SC8180X CLK_REF enable clocks. |
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Manivannan Sadhasivam
|
26447dad81 |
dt-bindings: clock: qcom: Add missing UFS QREF clocks
Add missing QREF clocks for UFS MEM and UFS CARD controllers.
Fixes:
|
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Bjorn Andersson
|
5ca4cd8eaa |
Merge branch '20240125-msm8953-mdss-reset-v2-1-fd7824559426@z3ntu.xyz' into arm64-for-6.9
Merge MSM8953 GCC DeviceTree binding update from topic branch, to get access to newly introduced MDSS reset constants. |
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Vladimir Lypak
|
18ba9974b8 |
dt-bindings: clock: gcc-msm8953: add more resets
Add new defines for some more BCRs found on MSM8953. Signed-off-by: Vladimir Lypak <vladimir.lypak@gmail.com> [luca: expand commit message, add more resets] Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Link: https://lore.kernel.org/r/20240125-msm8953-mdss-reset-v2-1-fd7824559426@z3ntu.xyz Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
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Bjorn Andersson
|
78654850f7 |
Merge branch '20240202-x1e80100-clock-controllers-v4-5-7fb08c861c7c@linaro.org' into clk-for-6.9
Merge X1E clock bindings through a topic branch, to make the defines available for inclusion in DeviceTree branches as well. |
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Rajendra Nayak
|
7180f3685d |
dt-bindings: clock: qcom: Document the X1E80100 Camera Clock Controller
Add bindings documentation for the X1E80100 Camera Clock Controller. Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20240202-x1e80100-clock-controllers-v4-5-7fb08c861c7c@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
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Abel Vesa
|
80de9d9dfb |
dt-bindings: clock: qcom: Document the X1E80100 TCSR Clock Controller
Add bindings documentation for the X1E80100 TCSR Clock Controller. Co-developed-by: Rajendra Nayak <quic_rjendra@quicinc.com> Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20240202-x1e80100-clock-controllers-v4-4-7fb08c861c7c@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
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Rajendra Nayak
|
bb213e13ce |
dt-bindings: clock: qcom: Document the X1E80100 GPU Clock Controller
Add bindings documentation for the X1E80100 Graphics Clock Controller. Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20240202-x1e80100-clock-controllers-v4-3-7fb08c861c7c@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
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Rajendra Nayak
|
4f70a09bde |
dt-bindings: clock: qcom: Document the X1E80100 Display Clock Controller
Add bindings documentation for the X1E80100 Display Clock Controller. Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20240202-x1e80100-clock-controllers-v4-2-7fb08c861c7c@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
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Conor Dooley
|
c886b7297e |
dt-bindings: clock: mpfs: add more MSSPLL output definitions
There are 3 undocumented outputs of the MSSPLL that are used for the CAN bus, "user crypto" module and eMMC. Add their clock IDs so that they can be hooked up in DT. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> |
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Konrad Dybcio
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e92c932674 |
dt-bindings: interconnect: Remove bogus interconnect nodes
The downstream kernel has infrastructure for passing votes from different interconnect nodes onto different RPMh RSCs. This neither implemented, not is going to be implemented upstream (in favor of a different solution using ICC tags through the same node). Unfortunately, as it happens, meaningless (in the upstream context) parts of the vendor driver were copied, ending up causing havoc - since all "per-RSC" (in quotes because they all point to the main APPS one) BCMs defined within the driver overwrite the value in RPMh on every aggregation. To both avoid keeping bogus code around and possibly introducing impossible-to-track-down bugs (busses shutting down for no reason), get rid of the duplicated ICC node definitions. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240102-topic-x1e_fixes-v1-2-70723e08d5f6@linaro.org Signed-off-by: Georgi Djakov <djakov@kernel.org> |
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Adam Skladowski
|
47878b4512 |
dt-bindings: interconnect: Add Qualcomm MSM8909 DT bindings
Add bindings for Qualcomm MSM8909 Network-On-Chip interconnect devices. [Stephan: Drop separate mm-snoc that exists downstream since it's actually the same NoC as SNoC in hardware] Signed-off-by: Adam Skladowski <a39.skl@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Stephan Gerhold <stephan.gerhold@kernkonzept.com> Link: https://lore.kernel.org/r/20231220-icc-msm8909-v2-1-3b68bbed2891@kernkonzept.com Signed-off-by: Georgi Djakov <djakov@kernel.org> |
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Duy Nguyen
|
3bbdf8c3d3 |
dt-bindings: clock: Add R8A779H0 V4M CPG Core Clock Definitions
Add all Clock Pulse Generator Core Clock Outputs for the Renesas R-Car V4M (R8A779H0) SoC. Signed-off-by: Duy Nguyen <duy.nguyen.rh@renesas.com> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/11acbd2a30b58607474e9c32eb798b3a00e85e73.1706194617.git.geert+renesas@glider.be |
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Duy Nguyen
|
8923149ffc |
dt-bindings: power: Add r8a779h0 SYSC power domain definitions
Add power domain indices for the Renesas R-Car V4M (R8A779H0) SoC. Signed-off-by: Duy Nguyen <duy.nguyen.rh@renesas.com> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/c5cbef71178cada761e9da7bcbb6f21334f93ef8.1706194617.git.geert+renesas@glider.be Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> |
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Satya Priya Kakitapalli
|
4b3dbd706a |
dt-bindings: clock: qcom,gcc-sm8150: Add gcc video resets for sm8150
Add gcc video axic, axi0 and axi1 resets for the global clock controller on sm8150. Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240111-sm8150-dfs-support-v2-2-6edb44c83d3b@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org> |