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Commit Graph

9 Commits

Author SHA1 Message Date
Haavard Skinnemoen
d6c49a7a78 [AVR32] extint: Set initial irq type to low level
David Brownell pointed out a mismatch in the avr32 extint code:

> I noticed a small glitch that's not fixed by this patch:  the
> initial type is falling edge, but IRQ_TYPE_NONE is mapped to
> IRQ_TYPE_LEVEL_LOW.  Potentially surprising.

Fix it by setting the initial type (and handler) to low level,
matching the meaning of IRQ_TYPE_NONE.

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2008-01-25 08:31:44 +01:00
David Brownell
e4f586f280 [AVR32] extint: change set_irq_type() handling
Update the AVR32 EIC code to use the new __set_irq_handler_unlocked()
call, getting rid of one more instance of this widespread problem.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2008-01-25 08:31:44 +01:00
Haavard Skinnemoen
e7ba176b47 [AVR32] NMI debugging
Change the NMI handler to use the die notifier chain to signal anyone
who cares. Add a simple "nmi debugger" which hooks into this chain and
that may dump registers, task state, etc. when it happens.

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2008-01-25 08:31:43 +01:00
Haavard Skinnemoen
86298962c0 [AVR32] Fix a couple of sparse warnings
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2007-10-23 11:19:24 +02:00
Haavard Skinnemoen
7a5b805907 [AVR32] Split SM device into PM, RTC, WDT and EIC
Split the SM platform device into separate platform devices for PM,
RTC, WDT and EIC. This is more correct according to the documentation
and allows us to simplify the code a little.

Also turn the EIC driver into a real platform driver.

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Acked-by: Hans-Christian Egtvedt <hcegtvedt@atmel.com>
2007-07-18 20:45:51 +02:00
David Brownell
58febc0b13 [AVR32] ext int fixes
Bugfixes for external irq handler set_irq_type():

 - If set_irq_type() can't set the type, don't change anything!

 - It's not OK to change the flow handler as part of set_irq_type(),
   among other issues that violates spinlock rules.  Instead, we can
   call the relevant handler when we demux the external interrupts.

 - The external irq demux has no need to grab the spinlock.  And in
   fact grabbing it that way was wrong, since that code might be
   pre-empted by an irq at a different priority level, and that code
   might then have tried to grab that spinlock...

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2007-02-09 15:01:57 +01:00
Haavard Skinnemoen
01cb087e74 [AVR32] Set flow handler for external interrupts
Make sure that the flow handler for external interrupts is updated
whenever they type is changed. Also make sure that the defaults
correspond with how the interrupt controller is configured.

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2006-12-08 13:06:23 +01:00
Haavard Skinnemoen
4e0fadfcf6 [PATCH] IRQ: Fix AVR32 breakage
Make the necessary changes to AVR32 required by the irq regs stuff.

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-10-11 11:14:14 -07:00
Haavard Skinnemoen
5f97f7f940 [PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.

AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density.  The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.

The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from

http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf

The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture.  It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit.  It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.

Full data sheet is available from

http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf

while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from

http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf

Information about the AT32STK1000 development board can be found at

http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918

including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.

Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.

This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.

[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 08:48:54 -07:00