1
Commit Graph

161 Commits

Author SHA1 Message Date
Daniel Walker
4ee7a6c2d1 msm: Kconfig: drop unused config options
These two config options don't exist, and aren't ever going to.
So I simply delete them.

Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-10-29 15:56:17 -07:00
Daniel Walker
06125ff051 msm: fix compile failure when no debug uart is selected
If the board has a debug uart the user is given a choice of which
uart to use. The user can also select NONE, which means not to use one.
In most of our header files when NONE is selected nothing is defined
for MSM_DEBUG_UART_PHYS or MSM_DEBUG_UART_BASE. This causes a compile
failure in debug-macro.S which expect something to be defined there.

Example of the failure,

arch/arm/kernel/built-in.o: In function `hexbuf':
linux-2.6/arch/arm/kernel/debug.S:186: undefined reference to `MSM_DEBUG_UART_PHYS'
linux-2.6/arch/arm/kernel/debug.S:186: undefined reference to `MSM_DEBUG_UART_BASE'

This fixes the compile failure by adding an ifdef to debug-macro.S
that removes all the debug uart code in the case of NONE.

Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-10-29 15:56:16 -07:00
Daniel Walker
bcd72c3e0a msm: fix debug-macro.S build failure
Originally there was an ifdef case to handle when no debug uart
was selected. In commit 0ea1293009
that case was removed which causes the following build failure,

linux-2.6/arch/arm/kernel/debug.S: Assembler messages:
linux-2.6/arch/arm/kernel/debug.S:174: Error: bad instruction `addruart r1,r2'
linux-2.6/arch/arm/kernel/debug.S:176: Error: bad instruction `waituart r2,r3'
linux-2.6/arch/arm/kernel/debug.S:177: Error: bad instruction `senduart r1,r3'
linux-2.6/arch/arm/kernel/debug.S:178: Error: bad instruction `busyuart r2,r3'
linux-2.6/arch/arm/kernel/debug.S:190: Error: bad instruction `addruart r1,r2'

This is a partial revert to add back the case which was removed with
two caveats. First the API for the addruart macro was updated, and
the new addruart case now return 0xfff00000 so that a know IO mapping
is created instead of a random one.

Cc: Jeremy Kerr <jeremy.kerr@canonical.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Jason Wang <jason77.wang@gmail.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Nicolas Pitre <nico@fluxnic.net>
Cc: Russell King - ARM Linux <linux@arm.linux.org.uk>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-10-29 15:56:04 -07:00
Jeff Ohlstein
6f9419619e msm: timer: Decrease shift on timer clocksource
The shift of 24 causes the shift and multiply operation to sometimes
overflow, resulting in incorrect timer values and poor performance.

Signed-off-by: Jeff Ohlstein <johlstei@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-10-27 14:24:02 -07:00
Vasiliy Kulikov
a86c44d48a arm: mach-msm: fix error handling in msm_iommu_probe()
msm_iommu_probe() didn't free mem_region and mapped IO.
Also if request_mem_region() failed then error handling
code dereferenced NULL pointer.

Signed-off-by: Vasiliy Kulikov <segooon@gmail.com>
Acked-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-10-27 14:24:02 -07:00
Daniel Walker
efdfb2b118 msm: fix Kconfig target board selection
This prevents build failures since it's currently possible to select
8x50, 7x30, or 7x00 without selecting a specific board. These changes
just force a target selection, which is currently defaulting to the most
common one (7x30 only has one).

Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-10-27 14:24:01 -07:00
Daniel Walker
79d98313e0 msm: fix compile failure on struct membank node member
In commit be37030274
"ARM: Remove DISCONTIGMEM support", it removed this "node" member
which cased the following compile failure in mach-msm,

linux/arch/arm/mach-msm/board-halibut.c: In function 'halibut_fixup':
linux/arch/arm/mach-msm/board-halibut.c:86: error: 'struct membank' has no member named 'node'
linux/arch/arm/mach-msm/board-halibut.c:86: error: implicit declaration of function 'PHYS_TO_NID'

I've removed the access to the node member which corrects the
compile failure.

Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-10-27 14:24:01 -07:00
Linus Torvalds
092e0e7e52 Merge branch 'llseek' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/bkl
* 'llseek' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/bkl:
  vfs: make no_llseek the default
  vfs: don't use BKL in default_llseek
  llseek: automatically add .llseek fop
  libfs: use generic_file_llseek for simple_attr
  mac80211: disallow seeks in minstrel debug code
  lirc: make chardev nonseekable
  viotape: use noop_llseek
  raw: use explicit llseek file operations
  ibmasmfs: use generic_file_llseek
  spufs: use llseek in all file operations
  arm/omap: use generic_file_llseek in iommu_debug
  lkdtm: use generic_file_llseek in debugfs
  net/wireless: use generic_file_llseek in debugfs
  drm: use noop_llseek
2010-10-22 10:52:56 -07:00
Nicolas Pitre
6451d7783b arm: remove machine_desc.io_pg_offst and .phys_io
Since we're now using addruart to establish the debug mapping, we can
remove the io_pg_offst and phys_io members of struct machine_desc.

The various declarations were removed using the following script:

  grep -rl MACHINE_START arch/arm | xargs \
  sed -i '/MACHINE_START/,/MACHINE_END/ { /\.\(phys_io\|io_pg_offst\)/d }'

[ Initial patch was from Jeremy Kerr, example script from Russell King ]

Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Acked-by: Eric Miao <eric.miao at canonical.com>
2010-10-20 00:27:46 -04:00
Jeremy Kerr
0ea1293009 arm: return both physical and virtual addresses from addruart
Rather than checking the MMU status in every instance of addruart, do it
once in kernel/debug.S, and change the existing addruart macros to
return both physical and virtual addresses. The main debug code can then
select the appropriate address to use.

This will also allow us to retreive the address of a uart for the MMU
state that we're not current in.

Updated with fixes for OMAP from Jason Wang <jason77.wang@gmail.com>
and Tony Lindgren <tony@atomide.com>, and fix for versatile express from
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>.

Signed-off-by: Jeremy Kerr <jeremy.kerr@canonical.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Jason Wang <jason77.wang@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Tested-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-10-20 00:27:33 -04:00
Russell King
3c00079b31 Merge branch 'msm-core' of git://codeaurora.org/quic/kernel/dwalker/linux-msm into devel-stable 2010-10-19 19:55:59 +01:00
Arnd Bergmann
6038f373a3 llseek: automatically add .llseek fop
All file_operations should get a .llseek operation so we can make
nonseekable_open the default for future file operations without a
.llseek pointer.

The three cases that we can automatically detect are no_llseek, seq_lseek
and default_llseek. For cases where we can we can automatically prove that
the file offset is always ignored, we use noop_llseek, which maintains
the current behavior of not returning an error from a seek.

New drivers should normally not use noop_llseek but instead use no_llseek
and call nonseekable_open at open time.  Existing drivers can be converted
to do the same when the maintainer knows for certain that no user code
relies on calling seek on the device file.

The generated code is often incorrectly indented and right now contains
comments that clarify for each added line why a specific variant was
chosen. In the version that gets submitted upstream, the comments will
be gone and I will manually fix the indentation, because there does not
seem to be a way to do that using coccinelle.

Some amount of new code is currently sitting in linux-next that should get
the same modifications, which I will do at the end of the merge window.

Many thanks to Julia Lawall for helping me learn to write a semantic
patch that does all this.

===== begin semantic patch =====
// This adds an llseek= method to all file operations,
// as a preparation for making no_llseek the default.
//
// The rules are
// - use no_llseek explicitly if we do nonseekable_open
// - use seq_lseek for sequential files
// - use default_llseek if we know we access f_pos
// - use noop_llseek if we know we don't access f_pos,
//   but we still want to allow users to call lseek
//
@ open1 exists @
identifier nested_open;
@@
nested_open(...)
{
<+...
nonseekable_open(...)
...+>
}

@ open exists@
identifier open_f;
identifier i, f;
identifier open1.nested_open;
@@
int open_f(struct inode *i, struct file *f)
{
<+...
(
nonseekable_open(...)
|
nested_open(...)
)
...+>
}

@ read disable optional_qualifier exists @
identifier read_f;
identifier f, p, s, off;
type ssize_t, size_t, loff_t;
expression E;
identifier func;
@@
ssize_t read_f(struct file *f, char *p, size_t s, loff_t *off)
{
<+...
(
   *off = E
|
   *off += E
|
   func(..., off, ...)
|
   E = *off
)
...+>
}

@ read_no_fpos disable optional_qualifier exists @
identifier read_f;
identifier f, p, s, off;
type ssize_t, size_t, loff_t;
@@
ssize_t read_f(struct file *f, char *p, size_t s, loff_t *off)
{
... when != off
}

@ write @
identifier write_f;
identifier f, p, s, off;
type ssize_t, size_t, loff_t;
expression E;
identifier func;
@@
ssize_t write_f(struct file *f, const char *p, size_t s, loff_t *off)
{
<+...
(
  *off = E
|
  *off += E
|
  func(..., off, ...)
|
  E = *off
)
...+>
}

@ write_no_fpos @
identifier write_f;
identifier f, p, s, off;
type ssize_t, size_t, loff_t;
@@
ssize_t write_f(struct file *f, const char *p, size_t s, loff_t *off)
{
... when != off
}

@ fops0 @
identifier fops;
@@
struct file_operations fops = {
 ...
};

@ has_llseek depends on fops0 @
identifier fops0.fops;
identifier llseek_f;
@@
struct file_operations fops = {
...
 .llseek = llseek_f,
...
};

@ has_read depends on fops0 @
identifier fops0.fops;
identifier read_f;
@@
struct file_operations fops = {
...
 .read = read_f,
...
};

@ has_write depends on fops0 @
identifier fops0.fops;
identifier write_f;
@@
struct file_operations fops = {
...
 .write = write_f,
...
};

@ has_open depends on fops0 @
identifier fops0.fops;
identifier open_f;
@@
struct file_operations fops = {
...
 .open = open_f,
...
};

// use no_llseek if we call nonseekable_open
////////////////////////////////////////////
@ nonseekable1 depends on !has_llseek && has_open @
identifier fops0.fops;
identifier nso ~= "nonseekable_open";
@@
struct file_operations fops = {
...  .open = nso, ...
+.llseek = no_llseek, /* nonseekable */
};

@ nonseekable2 depends on !has_llseek @
identifier fops0.fops;
identifier open.open_f;
@@
struct file_operations fops = {
...  .open = open_f, ...
+.llseek = no_llseek, /* open uses nonseekable */
};

// use seq_lseek for sequential files
/////////////////////////////////////
@ seq depends on !has_llseek @
identifier fops0.fops;
identifier sr ~= "seq_read";
@@
struct file_operations fops = {
...  .read = sr, ...
+.llseek = seq_lseek, /* we have seq_read */
};

// use default_llseek if there is a readdir
///////////////////////////////////////////
@ fops1 depends on !has_llseek && !nonseekable1 && !nonseekable2 && !seq @
identifier fops0.fops;
identifier readdir_e;
@@
// any other fop is used that changes pos
struct file_operations fops = {
... .readdir = readdir_e, ...
+.llseek = default_llseek, /* readdir is present */
};

// use default_llseek if at least one of read/write touches f_pos
/////////////////////////////////////////////////////////////////
@ fops2 depends on !fops1 && !has_llseek && !nonseekable1 && !nonseekable2 && !seq @
identifier fops0.fops;
identifier read.read_f;
@@
// read fops use offset
struct file_operations fops = {
... .read = read_f, ...
+.llseek = default_llseek, /* read accesses f_pos */
};

@ fops3 depends on !fops1 && !fops2 && !has_llseek && !nonseekable1 && !nonseekable2 && !seq @
identifier fops0.fops;
identifier write.write_f;
@@
// write fops use offset
struct file_operations fops = {
... .write = write_f, ...
+	.llseek = default_llseek, /* write accesses f_pos */
};

// Use noop_llseek if neither read nor write accesses f_pos
///////////////////////////////////////////////////////////

@ fops4 depends on !fops1 && !fops2 && !fops3 && !has_llseek && !nonseekable1 && !nonseekable2 && !seq @
identifier fops0.fops;
identifier read_no_fpos.read_f;
identifier write_no_fpos.write_f;
@@
// write fops use offset
struct file_operations fops = {
...
 .write = write_f,
 .read = read_f,
...
+.llseek = noop_llseek, /* read and write both use no f_pos */
};

@ depends on has_write && !has_read && !fops1 && !fops2 && !has_llseek && !nonseekable1 && !nonseekable2 && !seq @
identifier fops0.fops;
identifier write_no_fpos.write_f;
@@
struct file_operations fops = {
... .write = write_f, ...
+.llseek = noop_llseek, /* write uses no f_pos */
};

@ depends on has_read && !has_write && !fops1 && !fops2 && !has_llseek && !nonseekable1 && !nonseekable2 && !seq @
identifier fops0.fops;
identifier read_no_fpos.read_f;
@@
struct file_operations fops = {
... .read = read_f, ...
+.llseek = noop_llseek, /* read uses no f_pos */
};

@ depends on !has_read && !has_write && !fops1 && !fops2 && !has_llseek && !nonseekable1 && !nonseekable2 && !seq @
identifier fops0.fops;
@@
struct file_operations fops = {
...
+.llseek = noop_llseek, /* no read or write fn */
};
===== End semantic patch =====

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Julia Lawall <julia@diku.dk>
Cc: Christoph Hellwig <hch@infradead.org>
2010-10-15 15:53:27 +02:00
Niranjana Vishwanathapura
88b5227710 msm: smd: enable smd on qsd8x50 target
Add msm_smd device in the qsd8x50 board file.
Signed-off-by: Niranjana Vishwanathapura <nvishwan@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-10-11 15:14:02 -07:00
Niranjana Vishwanathapura
a8855e9c09 msm: smd: enable smd on msm7x30 target
Add msm_smd device in the msm7x30 board file.

Signed-off-by: Niranjana Vishwanathapura <nvishwan@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-10-11 15:13:05 -07:00
Stepan Moskovchenko
d9c8279b32 msm: Platform data for msm8x60 IOMMUs
Add the platform data for the IOMMUs found on the Qualcomm
msm8x60 SoC.

Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-10-08 15:12:52 -07:00
Stepan Moskovchenko
c6a5951ee5 msm: Platform initialization for the IOMMU driver
Register a driver for the MSM IOMMU devices and a driver
for the translation context devices. Set up the global
IOMMU registers and initialize the context banks.

Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-10-08 15:12:51 -07:00
Stepan Moskovchenko
0720d1f052 msm: Add MSM IOMMU support
Add support for the IOMMUs found on the upcoming Qualcomm
MSM8x60 chips. These IOMMUs allow virtualization of the
address space used by most of the multimedia cores on these
chips.

Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-10-08 15:12:50 -07:00
Gregory Bean
69b7f6ff85 msm: add MSM8x60 FFA support
The MSM8X60 FFA contains different components than the MSM8X60 SURF,
and therefore requires a different ARCH type and machine ID.

Signed-off-by: Gregory Bean <gbean@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-10-08 15:12:49 -07:00
Steve Muckle
57bbf1cc8c msm: MSM8X60 simulator board support
Board configuration for MSM8X60 simulation.

Signed-off-by: Steve Muckle <smuckle@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-10-08 15:12:48 -07:00
Steve Muckle
49b76f718d msm: add msm8x60_surf machine
Signed-off-by: Steve Muckle <smuckle@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-10-08 15:12:47 -07:00
Jeff Ohlstein
998ba079fe msm: physical offset for MSM8X60
The MSM8x60 has a different physical memory offset than other targets.

Signed-off-by: Jeff Ohlstein <johlstei@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-10-08 15:12:46 -07:00
Abhijeet Dharmapurikar
e4fbb68f45 msm: 8x60: setup correct handlers for private interrupts
Private Peripheral interrupts could be edge triggered or level triggered
depending on the platform. Initialize handlers for these in board file.

Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-10-08 15:12:45 -07:00
Jeff Ohlstein
569fb6e3e6 msm: add build support for msm8x60 target
Signed-off-by: Jeff Ohlstein <johlstei@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-10-08 15:12:44 -07:00
Daniel Walker
46fe5f29e3 msm: allow uart to be conditionally disabled
Some MSM targets don't select the debug UART in this way. For those we
need to disable this selection mechanism.

Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
Signed-off-by: Jeff Ohlstein <johlstei@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-10-08 15:12:43 -07:00
Daniel Walker
4ca06de368 msm: dma: add stub functions for dma features not yet present on 8x60
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
Signed-off-by: Jeff Ohlstein <johlstei@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-10-08 15:12:42 -07:00
Jeff Ohlstein
871c94a861 msm: clock: add dummy clock driver
Need to add this until real clock support for 8x60 goes in, or else some
drivers won't compile.

Signed-off-by: Jeff Ohlstein <johlstei@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-10-08 15:12:41 -07:00
Steve Muckle
9161d303af msm: 8x60: gic initialization fixup for RUMI
On RUMI platform STIs are not enabled by default, contrary to the
GIC spec. The bits for STIs in the enable/enable clear registers
are also RW instead of RO. STIs need to be enabled at initialization
time.

Signed-off-by: Steve Muckle <smuckle@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-10-08 15:12:40 -07:00
Steve Muckle
f880c5649e msm: irq: rename existing entry-macro to entry-macro-vic
The existing MSM irq entry macro is specific to a VIC
implementation. Renaming this makes room for irq support based on
other interrupt controllers.

Signed-off-by: Steve Muckle <smuckle@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-10-08 15:12:38 -07:00
Steve Muckle
a55df6edcf msm: MSM8X60 RUMI3 board support
Board configuration for MSM8X60 emulation on RUMI3.

Signed-off-by: Steve Muckle <smuckle@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-10-08 15:12:37 -07:00
Jeff Ohlstein
672039f035 msm: timer: support 8x60 timers
Signed-off-by: Jeff Ohlstein <johlstei@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-10-08 15:12:36 -07:00
Abhijeet Dharmapurikar
01eb4f5c77 msm: irqs-8x60: interrupt map
Define the interrupt map in irq-8x60.h

Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-10-08 15:12:35 -07:00
Steve Muckle
ed1f31b4b7 msm: initial irq definitions for MSM8X60
IRQ assignments are different for MSM8X60 than other existing MSMs.

Signed-off-by: Steve Muckle <smuckle@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-10-08 15:12:34 -07:00
Steve Muckle
6cf6dfefe1 msm: io: MSM8X60 io support
MSM8X60 has different IO mappings than previous MSMs.

Signed-off-by: Steve Muckle <smuckle@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-10-08 15:12:33 -07:00
Steve Muckle
c8aabaeb52 msm: create config option for proc-comm
Some builds may not support the proc-comm interface with
the baseband processor.

Signed-off-by: Steve Muckle <smuckle@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-10-08 15:12:32 -07:00
Gregory Bean
5d73c53b78 msm: qsd8x50: enable ethernet.
Configure the smc91x ethernet chip on the qsd8x50 SURF.

Signed-off-by: Gregory Bean <gbean@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-10-06 09:01:20 -07:00
Gregory Bean
26cc666071 msm: gpio: Add gpiomux calls to request and free.
Add gpiomux get and put calls to msmgpio request and free,
in order to allow gpio lines to be properly reference-counted
and power-managed.

Signed-off-by: Gregory Bean <gbean@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-10-06 09:01:19 -07:00
Gregory Bean
2783cc265c msm: add gpio driver for single-core SoCs.
Install a gpiolib driver supporting the on-chip gpios for
single-core MSMs in the 7x00 family, including 7x00A, 7x25, 7x27,
7x30, 8x50, and 8x50a.

As part of the ongoing effort to converge on a common code base,
this driver is based on the Google-Android msmgpio driver, whose
authors include Brian Swetland and Arve Hjønnevåg.

Cc: Arve Hjønnevåg <arve@android.com>
Cc: H Hartley Sweeten <hartleys@visionengravers.com>
Cc: Ryan Mallon <ryan@bluewatersys.com>
Cc: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Gregory Bean <gbean@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-10-06 09:01:19 -07:00
Gregory Bean
ab78cde589 msm: Featurize gpiomux.
Featurize gpiomux so that systems like 7x00 which do not wish to use it
do not have to be saddled with the configuration tables.

Signed-off-by: Gregory Bean <gbean@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-10-06 09:01:18 -07:00
Gregory Bean
10c4580e79 msm: gpio: Remove tlmm routines obsoleted by gpiomux.
Now that all supported gpio_tlmm_config-using boards
are using gpiomux, remove the deprecated code.

Signed-off-by: Gregory Bean <gbean@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-10-06 09:01:17 -07:00
Gregory Bean
224f6de46a msm: convert 7x30 to gpiomux.
Change deprecated gpio_tlmm_config calls to gpiomux calls.

Signed-off-by: Gregory Bean <gbean@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-10-06 09:01:17 -07:00
Gregory Bean
dd22b8f703 msm: convert 8x50 to gpiomux.
Change the gpio-init code from deprecated gpio_tlmm_config
to the new gpiomux api.

Signed-off-by: Gregory Bean <gbean@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-10-06 09:01:16 -07:00
Gregory Bean
1963a2afc8 msm: add gpiomux api for gpio multiplex & configuration.
Add the 'gpiomux' api, which addresses the following shortcomings
of existing tlmm api:

- gpio power-collapse, which is managed by a peripheral processor on
  other targets, must be managed by the application processor on the 8x60.
- The enable/disable flag of the legacy gpio_tlmm_config api
  is not applicable on the 8x60, and causes confusion.
- The gpio 'direction' bits are meaningless for all func_sel
  configurations except for generic-gpio mode (func_sel 0), in which
  case the gpio_direction_* functions should be used.  Having these
  bits in the tlmm api leads to confusion and misuse of the gpiolib
  api, and they have been removed in gpiomux.
- The functional api of the legacy system ran contrary to the typical
  use-case, which is a single massive configuration at boot.  Rather
  than forcing hundreds of 'config' function calls, the new api
  allows data to be configured with a single table.

gpiomux_get and gpiomux_put are meant to be called automatically
when gpio_request and gpio_free are called, giving automatic
gpiomux/tlmm control to those drivers/lines with simple
power profiles - in the simplest cases, an entry in the gpiomux table
and the correct usage of gpiolib is all that is required to get proper
gpio power control.

Signed-off-by: Gregory Bean <gbean@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-10-06 09:01:15 -07:00
Nicolas Pitre
7c63984b86 ARM: do not define VMALLOC_END relative to PAGE_OFFSET
VMALLOC_END is supposed to be an absolute value, while PAGE_OFFSET may
vary depending on the selected user:kernel memory split mode through
CONFIG_VMSPLIT_*.  In fact, the goal of moving PAGE_OFFSET down is to
accommodate more directly addressed RAM by the kernel below the vmalloc
area, and having VMALLOC_END move along PAGE_OFFSET is rather against
the very reason why PAGE_OFFSET can be moved in the first place.

Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2010-10-01 22:28:19 -04:00
Linus Torvalds
ce4327d372 Merge branch 'msm-core' of git://codeaurora.org/quic/kernel/dwalker/linux-msm
* 'msm-core' of git://codeaurora.org/quic/kernel/dwalker/linux-msm:
  msm: mmc: Add msm prefix to platform data structure
  msm: trout: Remove extern declaration from source file
  arm: msm: Fix section mismatch in smd.c.
  arm: msm: trout add mmc support
  arm: msm: trout: add trout specific gpio interrupts
  arm: msm: remove unused #include <linux/version.h>
2010-08-12 10:07:32 -07:00
Sahitya Tummala
b5d643de3e msm: mmc: Add msm prefix to platform data structure
Rename mmc_platform_data to msm_mmc_platform_data as it is used
only by MSM platform.

Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-08-09 15:48:23 -07:00
Sahitya Tummala
28d6c3db67 msm: trout: Remove extern declaration from source file
Add msm_add_sdcc() prototype to mach/board.h to fix the
checkpatch warning.

Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-08-09 15:46:31 -07:00
Gregory Bean
4416e9eb0b arm: msm: Fix section mismatch in smd.c.
Repair a section mismatch between the smd driver's
platform_driver structure and its probe method.

Signed-off-by: Gregory Bean <gbean@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-08-09 15:38:16 -07:00
Jiri Kosina
d790d4d583 Merge branch 'master' into for-next 2010-08-04 15:14:38 +02:00
Russell King
7b70c4275f Merge branch 'devel-stable' into devel
Conflicts:
	arch/arm/kernel/entry-armv.S
	arch/arm/kernel/setup.c
	arch/arm/mm/init.c
2010-07-31 14:20:16 +01:00
Russell King
be37030274 ARM: Remove DISCONTIGMEM support
Everything should now be using sparsemem rather than discontigmem, so
remove the code supporting discontigmem from ARM.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-16 10:57:35 +01:00