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Commit Graph

111295 Commits

Author SHA1 Message Date
Jeff Lackey
41130d37a4 [PATCH] ARM: 2650/1: PXA27x sleep - workaround Errata 39 & 50 (Patch 2667)
Patch from Jeff Lackey

This patch updates arch/arm/mach-pxa/sleep.S to support
the PXA270 CPU.  It works around Errata 39 & 50 from the
Intel(R) PXA27x Processor Family Specification Update.

Signed-off-by: Jeff Lackey
Signed-off-by: Russell King
2005-04-25 23:38:55 +01:00
Michael Chan
04237dddd1 [TG3]: Fix tg3_restart_ints()
tg3_restart_ints() is called to re-enable interrupts after tg3_poll()
has finished all the work. It calls tg3_cond_int() to force an interrupt
if the status block updated bit is set. The updated bit will be set if
there is a new status block update sometime during tg3_poll() and it can
be very often. The worst part is that even if all the work has been
processed, the updated bit remains set and an interrupt will be forced
unnecessarily.

The fix is to call tg3_has_work() instead to determine if new work is
posted before forcing an interrupt. The way to force an interrupt is
also changed to use "coalesce_now" instead of "SETINT". The former is
generally a safer way to force the interrupt.

Also deleted the first parameter to tg3_has_work() which is unused.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2005-04-25 15:17:17 -07:00
Michael Chan
52f6d697dc [TG3]: Refresh hw index in tg3_rx()
This patch refreshes the hw rx producer in tg3_rx() so that additional
work posted by the hardware can be processed.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2005-04-25 15:14:32 -07:00
Michael Chan
483ba50bd4 [TG3]: Fix bug in tg3_rx()
This patch fixes a bug that causes tg3_has_work() to always return 1.

rx work is determined by comparing tp->rx_rcb_ptr with the current hw
producer index. The hw producer index is modulo the ring size, but tp-
>rx_rcb_ptr is a free running counter that goes up beyond the ring size.
After the ring wraps around once, tg3_has_work() will always return 1.

The fix is to always do modulo arithmetic on tp->rx_rcb_ptr.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2005-04-25 15:14:03 -07:00
Lucas Correia Villa Real
eec99e345e [PATCH] ARM: 2645/1: Adds IIS definitions for the S3C2400
Patch from Lucas Correia Villa Real

Adds IISFCON definitions for the S3C2400 at
include/asm-arm/arch-s3c2400/regs-iis.h.

Signed-off-by: Lucas Correia Villa Real
Signed-off-by: Ben Dooks
Signed-off-by: Russell King
2005-04-25 23:13:15 +01:00
Lucas Correia Villa Real
bd7b170201 [PATCH] ARM: 2644/1: Adds S3C2400 support to uncompress.h
Patch from Lucas Correia Villa Real

The S3C2400 doesn't have a cpuid information stored anywhere. This patch adds
support to the S3C2400 at include/asm-arm/arch-s3c2400/uncompress.h by
initializing the cpuid variable to the S3C2410, as they share the same
routine. The GSTATUS1 pin is then used only if not compiling for the S3C2400.

Signed-off-by: Lucas Correia Villa Real
Signed-off-by: Ben Dooks
Signed-off-by: Russell King
2005-04-25 23:12:50 +01:00
Jesse Barnes
605036cf84 From: jbarnes@sgi.com
[IA64] fix ia64 Kconfig to allow CONFIG_PM on sn2

This probably should have been fixed when I fixed up the generic build for
discontig+numa machines, but oh well.

CONFIG_PM is allowable for generic builds but not for sn2 builds, which
doesn't make much sense, and in fact breaks the build if recent ACPI bits are
added to the tree.  It looks like the only arch that needs to prevent
CONFIG_PM stuff is the ski simulator (though those options could probably use
some cleanup as well), so remove the big conditional and replace it with a
simple test for IA64_HP_SIM instead.

Signed-off-by: Jesse Barnes <jbarnes@sgi.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
2005-04-25 13:31:04 -07:00
Greg Howard
fc626b278a [IA64-SGI] snsc_event.c new file
Forgot the "bk new" to add this file. Part of the patch
from Greg Howard

Signed-off-by: Tony Luck <tony.luck@intel.com>
2005-04-25 13:29:46 -07:00
Greg Howard
67639deb09 [IA64] Altix system controller event handling
The following is an update of the patch I sent yesterday
(3/9/05) incorporating suggestions from Christoph Hellwig and
Andreas Schwab.  It allows Altix and Altix-like systems to
handle environmental events generated by the system controllers,
and should apply on top of Jack Steiner's patch of 3/1/05 ("New
chipset support for SN platform") and Mark Goodwin's patch of
3/8/05 ("Altix SN topology support for new chipsets and pci
topology").

Signed-off-by: Greg Howard <ghoward@sgi.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
2005-04-25 13:28:52 -07:00
Kenji Kaneshige
b9e41d7fb6 [IA64] iosapic.c: typo ... s/spin_unlock_irq/spin_unlock/
vector sharing patch had a typo ... mismatched spin_lock() with
a spin_unlock_irq().  Fix from Kenji Kaneshige.

Signed-off-by: Tony Luck <tony.luck@intel.com>
2005-04-25 13:27:48 -07:00
Tony Luck
e1ed81ab7a [IA64] print "siblings" before {physical,core,thread} id
Rohit and Suresh changed their mind about the order to print things
in /proc/cpuinfo, but didn't include the change in the version of
the patch they sent to me.

Signed-off-by: Tony Luck <tony.luck@intel.com>
2005-04-25 13:27:12 -07:00
Kenji Kaneshige
24eeb568ae [IA64] vector sharing (Large I/O system support)
Current ia64 linux cannot handle greater than 184 interrupt sources
because of the lack of vectors. The following patch enables ia64 linux
to handle greater than 184 interrupt sources by allowing the same
vector number to be shared by multiple IOSAPIC's RTEs. The design of
this patch is besed on "Intel(R) Itanium(R) Processor Family Interrupt
Architecture Guide".

Even if you don't have a large I/O system, you can see the behavior of
vector sharing by changing IOSAPIC_LAST_DEVICE_VECTOR to fewer value.

Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
2005-04-25 13:26:23 -07:00
Suresh Siddha
e927ecb05e [IA64] multi-core/multi-thread identification
Version 3 - rediffed to apply on top of Ashok's hotplug cpu
patch.  /proc/cpuinfo output in step with x86.

This is an updated MC/MT identification patch based on the 
previous discussions on list. 

Add the Multi-core and Multi-threading detection for IPF.
  - Add new core and threading related fields in /proc/cpuinfo.
		Physical id
		Core id
		Thread id
		Siblings
  - setup the cpu_core_map and cpu_sibling_map appropriately
  - Handles Hot plug CPU
 
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
Signed-off-by: Gordon Jin <gordon.jin@intel.com>
Signed-off-by: Rohit Seth <rohit.seth@intel.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
2005-04-25 13:25:06 -07:00
Keith Owens
6118ec847e [IA64] __copy_user breaks on unaligned src
memcpy_mck.S::__copy_user breaks in the prefetch code under these conditions :-

* src is unaligned and
* dst is near the end of a page and
* the page after dst is unmapped.

Signed-off-by: Keith Owens <kaos@sgi.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
2005-04-25 13:23:47 -07:00
Tony Luck
f0a8d3c9ec [IA64] Need to handle lfetch in "no_context" case.
Thanks to Mark for tracking down this one.  Users of __copy_from_user_inatomic()
will be sad if we don't handle lfetch faults for the "no_context" case.

Signed-off-by: Tony Luck <tony.luck@intel.com>
2005-04-25 13:22:44 -07:00
Mark Goodwin
0985ea8f2d [IA64-SGI] Altix SN add support for slots in geoid_t locator
This patch against ia64-test-2.6.12 is needed for forthcoming
Altix chipsets. It renames geoid_any_t to geoid_common_t and
splits the 8bit 'slab' field into two 4bit fields for 'slab'
and 'slot'. Similar changes in the Altix SAL will retain backward
compatibility for old kernels.

Signed-off-by: Mark Goodwin <markgw@sgi.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
2005-04-25 13:21:54 -07:00
David Mosberger-Tang
a37d98f6a9 [IA64] fix syscall-optimization goof
Sadly, I goofed in this syscall-tuning patch:

ChangeSet 1.1966.1.40 2005/01/22 13:31:05 davidm@hpl.hp.com
  [IA64] Improve ia64_leave_syscall() for McKinley-type cores.

  Optimize ia64_leave_syscall() a bit better for McKinley-type cores.
  The patch looks big, but that's mostly due to renaming r16/r17 to r2/r3.
  Good for a 13 cycle improvement.

The problem is that the size of the physical stacked registers was
loaded into the wrong register (r3 instead of r17).  Since r17 by
coincidence always had the value 1, this had the effect of turning
rse_clear_invalid into a no-op.  That poses the risk of leaking kernel
state back to user-land and is hence not acceptable.

The fix below is simple, but unfortunately it costs us about 28 cycles
in syscall overhead. ;-(

Unfortunately, there isn't much we can do about that since those
registers have to be cleared one way or another.

	--david

Signed-off-by: Tony Luck <tony.luck@intel.com>
2005-04-25 13:20:38 -07:00
Russ Anderson
93a07d0a0e [IA64-SGI] Shub2 BTE support - BTE recovery code
patch 2:
	Shub2 BTE recovery code will be implemented in SAL.  
	Define the SAL interface.
	Modify bte_error to call SAL for shub2.

Signed-off-by: Russ Anderson <rja@sgi.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
2005-04-25 13:19:52 -07:00
Russ Anderson
95ff439a51 [IA64-SGI] Add new MMR definitions/Modify BTE initialiation&copy.
patch 1:
	Add new MMR definitions.
	Modify BTE initialiation.
	Modify BTE copy.

Signed-off-by: Russ Anderson <rja@sgi.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
2005-04-25 13:19:11 -07:00
Mark Maule
4628d7cada [IA64-SGI] disable TIOCA GART TLB prefetching
Patch to disable SGI TIOCA GART TLB prefetching due to hw bug.

Signed-off-by: Mark Maule <maule@sgi.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
2005-04-25 13:18:02 -07:00
Tony Luck
e96c9b4779 [IA64] MAX_PGT_FREES_PER_PASS must be 'L' to avoid warning
'min' is very picky about types of arguments, make it happy

Signed-off-by: Tony Luck <tony.luck@intel.com>
2005-04-25 13:16:59 -07:00
Tony Luck
c411cb5658 [IA64] fix: warning: `ql_size' might be used uninitialized
Oops.  Should have caught this before I checked it in.

Signed-off-by: Tony Luck <tony.luck@intel.com>
2005-04-25 13:16:16 -07:00
Alex Williamson
5f6602a101 [IA64] sba_iommu bug fixes
This fixes a couple of bugs in the zx1/sx1000 sba_iommu.  These are
all pretty low likelihood of hitting.  The first problem is a simple off
by one, deep in the sba_alloc_range() error path.  Surrounding that was
a lock ordering problem that could have potentially deadlocked with the
order the locks are grabbed in sba_unmap_single().  I moved the resource
locking into sba_search_bitmap() to prevent this.  Finally, there's a
potential race between unmapping pdir entries and marking incoming DMA
pages clean.  If you see any oddities, please let me know, but I've
tested it pretty thoroughly here.  Tony, please apply.  Thanks,

BTW, many of the options in this driver not on by default are becoming
more and more broken.  I'll be working on some patches to clean them
out, but I wanted to get this bug fix out first.

Signed-off-by: Alex Williamson <alex.williamson@hp.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
2005-04-25 13:14:36 -07:00
Robin Holt
fde740e4dd [IA64] Percpu quicklist for combined allocator for pgd/pmd/pte.
This patch introduces using the quicklists for pgd, pmd, and pte levels
by combining the alloc and free functions into a common set of routines.
This greatly simplifies the reading of this header file.

This patch is simple but necessary for large numa configurations.
It simply ensures that only pages from the local node are added to a
cpus quicklist.  This prevents the trapping of pages on a remote nodes
quicklist by starting a process, touching a large number of pages to
fill pmd and pte entries, migrating to another node, and then unmapping
or exiting.  With those conditions, the pages get trapped and if the
machine has more than 100 nodes of the same size, the calculation of
the pgtable high water mark will be larger than any single node so page
table cache flushing will never occur.

I ran lmbench lat_proc fork and lat_proc exec on a zx1 with and without
this patch and did not notice any change.

On an sn2 machine, there was a slight improvement which is possibly
due to pages from other nodes trapped on the test node before starting
the run.  I did not investigate further.

This patch shrinks the quicklist based upon free memory on the node
instead of the high/low water marks.  I have written it to enable
preemption periodically and recalculate the amount to shrink every time
we have freed enough pages that the quicklist size should have grown.
I rescan the nodes zones each pass because other processess may be
draining node memory at the same time as we are adding.

Signed-off-by: Robin Holt <holt@sgi.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
2005-04-25 13:13:16 -07:00
Bruce Losure
ff3eb55ed9 [IA64-SGI]
Missed the "bk new" for this file in the last commit.

Signed-off-by: Bruce Losure <blosure@sgi.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
2005-04-25 13:12:02 -07:00
Aaron J Young
c1298c5c7e [IA64-SGI] Altix: enable poweroff
This patch adds the necessary "hook" to allow SGI/SN
machines to perform a system power off upon a 
'init 0', 'halt -p', 'poweroff' or 'shutdown -h'.

The "hook" is to set the pm_power_off callback
to ia64_sn_power_down(). pm_power_off is checked
in machine_power_off()/do_poweroff() and, if set, is executed. 
ia64_sn_power_down() is a function already present (but not 
used currently) in the sn kernel.
ia64_sn_power_down() makes a SAL call to execute the
power off.

Signed-off-by: Aaron J Young <ayoung@sgi.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
2005-04-25 13:11:14 -07:00
Bruce Losure
e1e19747ec [IA64-SGI] Bus driver for the CX port of SGI's TIO chip.
This patch is to provide CX port infrastructure for SGI TIO-based
h/w.   Also a 'core services' driver for SGI FPGA-based h/w.
                                                                                
Signed-off-by: Bruce Losure <blosure@sgi.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
2005-04-25 13:09:41 -07:00
Stephane Eranian
4944930ab7 [IA64] perfmon: make pfm_sysctl a global, and other cleanup
- make pfm_sysctl a global such that it is possible
  to enable/disable debug printk in sampling formats
  using PFM_DEBUG.

- remove unused pfm_debug_var variable

- fix a bug in pfm_handle_work where an BUG_ON() could
  be triggered. There is a path where pfm_handle_work()
  can be called with interrupts enabled, i.e., when
  TIF_NEED_RESCHED is set. The fix correct the masking
  and unmasking of interrupts in pfm_handle_work() such
  that we restore the interrupt mask as it was upon entry.

signed-off-by: stephane eranian <eranian@hpl.hp.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
2005-04-25 13:08:30 -07:00
Colin Ngam
658b32cad9 [IA64-SGI] support variable length nasids in shub2
This patch enables our TIO IO chipset to support variable length nasids in 
Shub2 chipset.

Signed-off-by: Colin Ngam <cngam@sgi.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
2005-04-25 13:07:00 -07:00
Colin Ngam
be539c73b5 [IA64-SGI] Shub2 provides an addition of 2 External Interrupt events.
Signed-off-by: Colin Ngam <cngam@sgi.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
2005-04-25 13:06:28 -07:00
Mark Goodwin
f1e2a1c8a1 [IA64-SGI] Altix SN topology fix potential infinite loop
Fix infinite loop if sn_hwperf_location_to_bpos() fails.

Signed-off-by: Mark Goodwin <markgw@sgi.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
2005-04-25 13:05:08 -07:00
Mark Goodwin
4a5c13c7eb [IA64-SGI] Altix SN topology support for new chipsets and pci topology
please accept this patch to the Altix SN platform topology export
interface to support new chipsets and to export PCI topology.

This follows on top of Jack Steiner's patch dated March 1st
("New chipset support for SN platform").

Signed-off-by: Mark Goodwin <markgw@sgi.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
2005-04-25 13:04:22 -07:00
David Mosberger-Tang
30325d1771 [IA64] speed up syscall path a bit more
Recently I noticed that clearing ar.ssd/ar.csd right before srlz.d is
causing significant stalling in the syscall path.  The patch below
fixes that by moving the register-writes after srlz.d.  On a Madison,
this drops break-based getpid() from 241 to 226 cycles (-15 cycles).

Signed-off-by: David Mosberger-Tang <davidm@hpl.hp.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
2005-04-25 13:03:16 -07:00
David S. Miller
cbdbf00aaf [PKT_SCHED]: Eliminate unnecessary includes in simple.c
Noted by Al Viro.

Signed-off-by: David S. Miller <davem@davemloft.net>
2005-04-25 12:15:01 -07:00
Patrick McHardy
b31e5b1bb5 [NETFILTER]: Drop conntrack reference when packet leaves IP
In the event a raw socket is created for sending purposes only, the creator
never bothers to check the socket's receive queue.  But we continue to
add skbs to its queue until it fills up.

Unfortunately, if ip_conntrack is loaded on the box, each skb we add to the
queue potentially holds a reference to a conntrack.  If the user attempts
to unload ip_conntrack, we will spin around forever since the queued skbs
are pinned.

Signed-off-by: Patrick McHardy <kaber@trash.net>
Signed-off-by: David S. Miller <davem@davemloft.net>
2005-04-25 12:01:07 -07:00
Yasuyuki KOZAKAI
f649a3bfd1 [NETFILTER]: Fix truncated sequence numbers in FTP helper
Signed-off-by: Yasuyuki KOZAKAI <yasuyuki.kozkaai@toshiba.co.jp>
Signed-off-by: Patrick McHardy <kaber@trash.net>
Signed-off-by: David S. Miller <davem@davemloft.net>
2005-04-25 12:00:04 -07:00
Keith Owens
e8d1cb2f28 [IA64] Tighten up unw_unwind_to_user check
Detect user space by the unwind frame with predicate PRED_USER_STACK
set, instead of a user space IP.  Tighten up the last ditch check for
running off the top of the kernel stack.

Based on a suggestion by David Mosberger, reworked to fit the current
tree.  This survives my stress test which used to break 2.6.9 kernels.
Unlike 2.6.11, the stress test now unwinds to the correct point, so
gdb can get the user space registers.

Signed-off-by: Keith Owens <kaos@sgi.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
2005-04-25 11:45:26 -07:00
David Mosberger-Tang
8297511530 [IA64] add missing cpu_relax() in ITC syncing code
Call cpu_relax() in busy-waiting loops of the ITC-syncing code.

Signed-off-by: David Mosberger-Tang <davidm@hpl.hp.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
2005-04-25 11:44:02 -07:00
Jack Steiner
bf1cf98fa9 [IA64-SGI] Change SAL call request code for SN systems
Change the value of the SAL call number for a new SAL request. The
initial implementation in the PROM did not match what the OS expected. 
Since the OS can run on PROMs that do not implement the new call, 
changing the call number avoids the issue. New PROMs will implement
the new call number. (This avoids problems with the 4.05 PROM).

Signed-off-by: Jack Steiner <steiner@sgi.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
2005-04-25 11:42:39 -07:00
Mark Maule
9c90bdde77 [IA64-SGI] altix: tioca chip driver (agp)
Provide a driver for the altix TIOCA AGP chipset.  An agpgart backend will
be provided as a separate patch.

Signed-off-by: Mark Maule <maule@sgi.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
2005-04-25 11:35:54 -07:00
Mark Maule
9b08ebd167 [IA64-SGI] sn2-move-pci-headers.patch
Move a couple of headers out of arch/ia64/sn/include/pci and into
include/asm-ia64/sn.

Signed-off-by: Mark Maule <maule@sgi.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
2005-04-25 11:32:16 -07:00
Mark Maule
e955d82543 [IA64-SGI] sn2-pci-dma-abstraction.patch
Provide an abstraction of the altix pci dma runtime layer so that multiple
pci-based bridges can be supported.

Signed-off-by: Mark Maule <maule@sgi.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
2005-04-25 11:26:03 -07:00
Lucas Correia Villa Real
b7ebcc108a [PATCH] ARM: 2641/1: Adds S3C2400_SPPIN_nCS to arch-s3c2410/regs-spi.h
Patch from Lucas Correia Villa Real

Adds a define to the SPI Card Select bit on the S3C2400 into
include/asm-arm/arch-s3c2410/regs-spi.h

Signed-off-by: Lucas Correia Villa Real
Signed-off-by: Russell King
2005-04-25 18:40:31 +01:00
Lucas Correia Villa Real
a334242136 [PATCH] ARM: 2640/1: Adds DRAM/BANKSIZE_MASK definitions for S3C2400
Patch from Lucas Correia Villa Real

Adds DRAM refresh definitions and sets the BANKSIZE_MASK for the S3C2400 on
include/asm-arm/arch-s3c2400/regs-mem.h

Signed-off-by: Lucas Correia Villa Real
Signed-off-by: Ben Dooks
Signed-off-by: Russell King
2005-04-25 18:36:50 +01:00
Adrian Bunk
25ee7e3832 [PATCH] fs/aio.c: make some code static
This patch makes some needlessly global code static.

Signed-off-by: Adrian Bunk <bunk@stusta.de>
Acked-by: Benjamin LaHaise <bcrl@kvack.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-04-25 08:18:14 -07:00
Al Viro
056de2fa12 [PATCH] ppc user annotations: debug_setconetext(2)
3rd argument of sys_debug_setcontext() is also a userland pointer.

Signed-off-by: Al Viro <viro@parcelfarce.linux.theplanet.co.uk>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-04-25 07:55:59 -07:00
Al Viro
dc074a8a32 [PATCH] ppc iomem annotations: mv643xx_eth
void * __iomem replaced with intended void __iomem *.

Signed-off-by: Al Viro <viro@parcelfarce.linux.theplanet.co.uk>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-04-25 07:55:58 -07:00
Al Viro
91de1fff2d [PATCH] ppc sparse annotations: emulate_string_inst()
replaced declaration of EA from u32 to unsigned long - this beast is
used only to cast it to (userland) pointer and proper integer type for
that is unsigned long. 

Signed-off-by: Al Viro <viro@parcelfarce.linux.theplanet.co.uk>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-04-25 07:55:58 -07:00
Al Viro
d01daf72f0 [PATCH] ppc iomem annotations: pmac_low_i2c
Signed-off-by: Al Viro <viro@parcelfarce.linux.theplanet.co.uk>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-04-25 07:55:58 -07:00
Al Viro
ba724a373a [PATCH] ppc iomem annotations: ebony_setup_pcix()
Signed-off-by: Al Viro <viro@parcelfarce.linux.theplanet.co.uk>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-04-25 07:55:58 -07:00