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Commit Graph

5 Commits

Author SHA1 Message Date
Tejun Heo
68d1d07b51 libata: implement and use SHT initializers
libata lets low level drivers build scsi_host_template and register it
to the SCSI layer.  This allows low level drivers high level of
flexibility but also burdens them with lots of boilerplate entries.

This patch implements SHT initializers which can be used to initialize
all the boilerplate entries in a sht.  Three variants of them are
implemented - BASE, BMDMA and NCQ - for different types of drivers.
Note that entries can be overriden by putting individual initializers
after the helper macro.

All sht tables are identical before and after this patch.

Signed-off-by: Tejun Heo <htejun@gmail.com>
2008-04-17 15:44:17 -04:00
Tejun Heo
358f9a77a6 libata: implement and use ata_noop_irq_clear()
->irq_clear() is used to clear IRQ bit of a SFF controller and isn't
useful for drivers which don't use libata SFF HSM implementation.
However, it's a required callback and many drivers implement their own
noop version as placeholder.  This patch implements ata_noop_irq_clear
and use it to replace those custom placeholders.

Also, SFF drivers which don't support BMDMA don't need to use
ata_bmdma_irq_clear().  It becomes noop if BMDMA address isn't
initialized.  Convert them to use ata_noop_irq_clear().

Signed-off-by: Tejun Heo <htejun@gmail.com>
2008-04-17 15:44:16 -04:00
Joe Perches
1967b7ff75 drivers/ata/: Spelling fixes
Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: Adrian Bunk <bunk@kernel.org>
2008-02-03 17:08:11 +02:00
Kristoffer Nyborg Gregertsen
1c20a493ca Several fixes for the AVR32 PATA driver
Several fixes for the AVR32 PATA driver:

* Updated to use new AVR32 SMC timing API. This removes the need for "magic"
constants in signal timing.

* Removed the ATA_FLAG_PIO_POLLING, the driver should use interrupts.

* Removed .port_disable and .irq_ack as these are no longer needed.

* Improved some comments.

Signed-off-by: Kristoffer Nyborg Gregertsen <kngregertsen@norway.atmel.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-12-01 17:35:58 -05:00
Kristoffer Nyborg Gregertsen
7c9ef8e418 AVR32 PATA driver
Updated and simplified driver. Use only register transfer timing for both
data and register transfers. This gives poorer performance in PIO1 and 2,
but should not be a problem in PIO3 and 4, correct me if I'm wrong :)

The driver works very we'll but I still wonder about the interrupts. I have
an interrupt line, that works nicely when POLLING flag is not set. The
problem is the number of interrupts that eat away my CPU cycles.

When using the POLLING flag there seem to be some interrupts that dosen't get
cleared. Furthermore the device dosen't drive INTRQ high, it stays at 2.5 volts
and generates a lot of interrupts due to ripple / noise. What to do?

Signed-off-by: Kristoffer Nyborg Gregertsen <kngregertsen@norway.atmel.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-10-12 14:55:37 -04:00