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Commit Graph

4 Commits

Author SHA1 Message Date
Mark Brown
e9c08f0d57 ARM: S3C64XX: Redo voltage ranges for cpufreq
The documentation for the S3C6410 CPU voltage scaling is rather
unclear, with omitted values for several speed settings. Originally
the code was using only quoted values, resulting in some fairly odd
settings. The S3C6410 is also unusual in that the both the maximum
and minimum voltages quoted scale as the frequency rises, rather
than just the minimum voltage.

Clean this up a bit by always using the specified typical settings
as the minimum voltage (ignoring any specified minimum voltage) in
order to avoid running near the edge of the processor capabilities.
Also use the next quoted maximum voltages rather than the typical
voltages where no maximum voltage is quoted, allowing operation on
a greater range of systems.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2009-12-01 01:35:39 +00:00
Mark Brown
43f1069ef9 ARM: S3C64XX: Separate out regulator and frequency latencies
Currently the transition latency reported by the S3C64xx cpufreq
driver includes both the time for the CPU to reclock itself and
the time for a regulator to change voltage. This means that if
a regulator is not in use then the transition latency reported
is excessively high.

In future the regulator API will be extended to report latencies
so the driver will be able to query the performance of a given
regulator.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2009-12-01 01:35:38 +00:00
Mark Brown
383af9c258 ARM: S3C64XX: Provide logging when CPU frequencies are eliminated due to clocks
This provides symmetry with the voltage based checks done for the
regulator.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2009-12-01 01:35:38 +00:00
Mark Brown
b3748ddd80 [ARM] S3C64XX: Initial support for DVFS
This patch provides initial support for CPU frequency scaling on the
Samsung S3C ARM processors. Currently only S3C6410 processors are
supported, though addition of another data table with supported clock
rates should be sufficient to enable support for further CPUs.

Use the regulator framework to provide optional support for DVFS in
the S3C cpufreq driver. When a software controllable regulator is
configured the driver will use it to lower the supply voltage when
running at a lower frequency, giving improved power savings.

When regulator support is disabled or no regulator can be obtained
for VDDARM the driver will fall back to scaling only the frequency.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2009-06-16 23:36:24 +01:00