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Commit Graph

11 Commits

Author SHA1 Message Date
Russell King
067173526c ARM: Provide common header for hard_smp_processor_id()
Provide a common header to read the SMP CPU number from the MPIDR.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-10-04 20:20:45 +01:00
Changhwan Youn
766211e748 ARM: S5PV310: Fix on Secondary CPU startup
Following occurs on boot message without this patch.
    CPU1: processor failed to boot
    Brought up 1 CPUs
    SMP: Total of 1 processors activated...

This patch adds SYSRAM mapping for fixing Secondary CPU startup.
    CPU1: Booted secondary processor
    Brought up 2 CPUs
    SMP: Total of 2 processors activated...

Signed-off-by: Changhwan Youn <chaos.youn@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-08-27 18:29:58 +09:00
Jongpill Lee
3297c2e6d7 ARM: S5PV310: Bug fix on uclk1 and sclk_pwm
This patch fixes on enable and ctrlbit of uclk1 and sclk_pwm.

Signed-off-by: Jongpill Lee <boyko.lee@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-08-27 18:29:27 +09:00
Kukjin Kim
c598c47d85 ARM: S5PV310: Add CMU block for S5PV310 Clock
This patch adds CMU block for S5PV310/S5PC210 clock.
(CMU: Clock Management Unit)
Of course, changed current clock addresses for it together.

Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-08-27 18:04:37 +09:00
Kukjin Kim
35fc950bd5 ARM: S5PV310: Fix on typo irqs.h of S5PV310
This patch fixes typo 'IRQ_WTD' in the irqs.h of S5PV310.
And minor update comments.

Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-08-27 18:04:13 +09:00
Kyungmin Park
4d9147053b ARM: S5PV310: Fix on GPIO base addresses
The S5PV310/S5PC210 has following three GPIO base addresses.

Part1 Base Address=0x11400000
Part2 Base Address=0x11000000
Part3 Base Address=0x03860000

Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
[kgene.kim@samsung.com: minor edit of title]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-08-27 15:29:01 +09:00
Kyungmin Park
c1eea3756a ARM: S5P: VMALLOC_END should be unsigned long
Silences following build warning:

arch/arm/mm/init.c: In function 'mem_init':
arch/arm/mm/init.c:644: warning: format '%08lx' expects type 'long
unsigned int', but argument 12 has type 'unsigned int'

Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-08-23 10:50:36 +09:00
Changhwan Youn
cfca3a619b ARM: S5PV310: Add Timer support
This patch adds timer support for S5PV310.  Until now, all S5P SoCs
use CONFIG_ARCH_USES_GETTIMEOFFSET macro as a default configuration.
Instead,S5PV310 implements clocksource and clock_event_device to
support the high resolution timer and tickless system.

Signed-off-by: Changhwan Youn <chaos.youn@samsung.com>
Signed-off-by: Hyuk Lee <hyuk1.lee@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-08-05 18:32:42 +09:00
Changhwan Youn
84bbc16c1f ARM: S5PV310: Add IRQ support
This patch adds IRQ support for S5PV310.
ARM GIC is installed in S5PV310 instead of VIC which is in every other CPUs
in S5P series. Several irq combiners are used to resolve the lack of irq
lines in current implementation.

Signed-off-by: Changhwan Youn <chaos.youn@samsung.com>
Signed-off-by: Hyuk Lee <hyuk1.lee@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-08-05 18:32:41 +09:00
Changhwan Youn
c8bef14051 ARM: S5PV310: Add Clock and PLL support
This patch adds clock and pll support for S5PV310.

Signed-off-by: Changhwan Youn <chaos.youn@samsung.com>
Signed-off-by: Jongpill Lee <boyko.lee@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-08-05 18:32:41 +09:00
Changhwan Youn
2b12b5c4ff ARM: S5PV310: Add new CPU initialization support
This patch adds Samsung S5PV310/S5PC210 CPU support.
The S5PV310/S5PC210 integrates a ARM Cortex A9 multi-core.

Signed-off-by: Changhwan Youn <chaos.youn@samsung.com>
Signed-off-by: Jongpill Lee <boyko.lee@samsung.com>
Signed-off-by: Jiseong Oh <jiseong.oh@samsung.com>
[kgene.kim@samsung.com: fix build errors]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-08-05 18:32:41 +09:00