MX27_3DS board has a MC13783 PMIC connected to the CSPI2 port.
Add support for the PMIC.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Use clk_get to acquire the watchdog clock and also avoid hardcoding the clock name.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Instead of reading the silicon version from ROM, we should
read the SREV register from the IIM.
Freescale has dropped all support for MX51 REV1.0, only MX51
REV 2.0 and 3.0 are valid.
Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
factorise some generic infrastructure to assist looking up struct clks
for the ARM & SH architecture.
as the code is identical at 99%
put the arch specific code for allocation as example in asm/clkdev.h
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Paul Mundt <lethal@linux-sh.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Code called from an initcall can be maybe called for
machines it's not intended for. So check for valid
machines and return gracefully if an incompatible machine
is found.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Code called from an initcall can be maybe called for
machines it's not intended for. So check for valid
machines and return gracefully if an incompatible machine
is found.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds a Kconfig option for the avic irq controller
and lets the SoCs that need it select this option.
Also, as we have two irq controllers for i.MX, irq.c is not
appropriate anymore, so rename it to avic.c
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The following patch is a first step to convert the 'struct pad_desc'
to a bitmapped cookie to facilitate adding platform specific pullup or
drive strength definitions to existing pad definitions without need to
rewrite the complete pad def.
The patch wraps 'struct pad_desc' in an opaque data type and
introduces macros to access the individual members.
This patch does not constitute any functional change!
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This way FB_IMX can just depend on HAVE_FB_IMX and machines
just need to select IMX_HAVE_PLATFORM_IMX_FB without bothering
about HAVE_FB_IMX.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Currently there is no platform data used in the driver. In case this
changes and for consistency NULL is passed unused to the soc specific
functions.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Currently there is no platform data used in the driver. In case this
changes NULL is passed unused to the soc specific functions.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
This allows changing the mapping without the need to adapt all users.
While at it remove some unneeded casts to void __iomem *, this is already
taken care for in the IO_ADDRESS macros
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
This makes less code rely on the virtual constants.
To further simplify code and reduce the needed boilerplate when
defining the static mappings a new helper macro is defined in
mach/hardware.h.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Currently compilation breaks for the eukrea mbimx27 baseboard
when CONFIG_SPI_IMX is selected and CONFIG_TOUCHSCREEN_ADS7846
is not selected. Fix this by removing the ifdefs altogether.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Eric Benard <eric@eukrea.com>
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (215 commits)
ARM: memblock: setup lowmem mappings using memblock
ARM: memblock: move meminfo into find_limits directly
ARM: memblock: convert free_highpages() to use memblock
ARM: move freeing of highmem pages out of mem_init()
ARM: memblock: convert memory detail printing to use memblock
ARM: memblock: use memblock to free memory into arm_bootmem_init()
ARM: memblock: use memblock when initializing memory allocators
ARM: ensure membank array is always sorted
ARM: 6466/1: implement flush_icache_all for the rest of the CPUs
ARM: 6464/2: fix spinlock recursion in adjust_pte()
ARM: fix memblock breakage
ARM: 6465/1: Fix data abort accessing proc_info from __lookup_processor_type
ARM: 6460/1: ixp2000: fix type of ixp2000_timer_interrupt
ARM: 6449/1: Fix for compiler warning of uninitialized variable.
ARM: 6445/1: fixup TCM memory types
ARM: imx: Add wake functionality to GPIO
ARM: mx5: Add gpio-keys to mx51 babbage board
ARM: imx: Add gpio-keys to plat-mxc
mx31_3ds: Fix spi registration
mx31_3ds: Fix the logic for detecting the debug board
...
* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx: (48 commits)
DMAENGINE: move COH901318 to arch_initcall
dma: imx-dma: fix signedness bug
dma/timberdale: simplify conditional
ste_dma40: remove channel_type
ste_dma40: remove enum for endianess
ste_dma40: remove TIM_FOR_LINK option
ste_dma40: move mode_opt to separate config
ste_dma40: move channel mode to a separate field
ste_dma40: move priority to separate field
ste_dma40: add variable to indicate valid dma_cfg
async_tx: make async_tx channel switching opt-in
move async raid6 test to lib/Kconfig.debug
dmaengine: Add Freescale i.MX1/21/27 DMA driver
intel_mid_dma: change the slave interface
intel_mid_dma: fix the WARN_ONs
intel_mid_dma: Add sg list support to DMA driver
intel_mid_dma: Allow DMAC2 to share interrupt
intel_mid_dma: Allow IRQ sharing
intel_mid_dma: Add runtime PM support
DMAENGINE: define a dummy filter function for ste_dma40
...
Since we're now using addruart to establish the debug mapping, we can
remove the io_pg_offst and phys_io members of struct machine_desc.
The various declarations were removed using the following script:
grep -rl MACHINE_START arch/arm | xargs \
sed -i '/MACHINE_START/,/MACHINE_END/ { /\.\(phys_io\|io_pg_offst\)/d }'
[ Initial patch was from Jeremy Kerr, example script from Russell King ]
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Acked-by: Eric Miao <eric.miao at canonical.com>
without this patch we get :
arch/arm/mach-imx/built-in.o: In function `eukrea_cpuimx27_init':
eukrea_mbimx27-baseboard.c:(.init.text+0x44c): undefined reference to `mxc_ulpi_access_ops'
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Recent clean of i.MX devices registration changed the i2C bus number
selected for our platform (Freescale start peripheral ID at 1, kernel
now start it at 0 so i.MX27's i2c 1 is kernel's i2c 0).
Without this fix, i2c is unusable on this platform.
Signed-off-by: Eric Bénard <eric@eukrea.com>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
without this patch we get :
arch/arm/mach-imx/built-in.o: In function `eukrea_cpuimx27_init':
eukrea_mbimx27-baseboard.c:(.init.text+0x44c): undefined reference to `mxc_ulpi_access_ops'
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds support for the Freescale i.MX SDMA engine.
The SDMA engine is a scatter/gather DMA engine which is implemented
as a seperate coprocessor. SDMA needs its own firmware which is
requested using the standard request_firmware mechanism. The firmware
has different entry points for each peripheral type, so drivers
have to pass the peripheral type to the DMA engine which in turn
picks the correct firmware entry point from a table contained in
the firmware image itself.
The original Freescale code also supports support for transfering
data to the internal SRAM which needs different entry points to
the firmware. Support for this is currently not implemented. Also,
support for the ASRC (asymmetric sample rate converter) is skipped.
I took a very simple approach to implement dmaengine support. Only
a single descriptor is statically assigned to a each channel. This
means that transfers can't be queued up but only a single transfer
is in progress. This simplifies implementation a lot and is sufficient
for the usual device/memory transfers.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Linus Walleij <linus.ml.walleij@gmail.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
