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Commit Graph

13 Commits

Author SHA1 Message Date
Neha Malcom Francis
e44097c6d5 soc: ti: k3-socinfo: Add J721E SR2.0
Add support to detect J721E SR2.0

Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Link: https://lore.kernel.org/r/20240624065205.718449-1-n-francis@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
2024-06-27 17:45:42 -05:00
Vaishnav Achath
2c2235292b soc: ti: k3-socinfo: Add JTAG ID for J722S
Add JTAG ID info for the J722S SoC family to enable SoC detection.

More details about this SoC can be found in the TRM:
	https://www.ti.com/lit/zip/sprujb3

Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Reviewed-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20231211132600.25289-1-vaishnav.a@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
2023-12-13 07:52:32 -06:00
Neha Malcom Francis
3ba080bf46 soc: ti: k3-socinfo: Revamp driver to accommodate different rev structs
k3-socinfo.c driver assumes silicon revisions for every platform are
incremental and one-to-one, corresponding to JTAG_ID's variant field:
1.0, 2.0 etc. This assumption is wrong for SoCs such as J721E, where the
variant field to revision mapping is 1.0, 1.1. Further, there are SoCs
such as AM65x where the sub-variant version requires custom decoding of
other registers.

Address this by using conditional handling per JTAG ID that requires an
exception with J721E as the first example. To facilitate this
conversion, use macros to identify the JTAG_ID part number and map them
to predefined string array.

Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Co-developed-by: Thejasvi Konduru <t-konduru@ti.com>
Signed-off-by: Thejasvi Konduru <t-konduru@ti.com>
Link: https://lore.kernel.org/r/20231016101608.993921-4-n-francis@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
2023-12-06 08:58:08 -06:00
Neha Malcom Francis
3aeb0d3694 soc: ti: k3-socinfo: Avoid overriding return value
Avoid overriding the return value and make sure the right error code
is reflected. If the part is none of the identified list present in
k3_soc_ids[], return -ENODEV.

Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Link: https://lore.kernel.org/r/20231016101608.993921-3-n-francis@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
2023-10-16 11:38:17 -05:00
Neha Malcom Francis
8dec342ead soc: ti: k3-socinfo: Fix typo in bitfield documentation
Fix documentation that indicates wrong bit.

Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Link: https://lore.kernel.org/r/20231016101608.993921-2-n-francis@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
2023-10-16 11:36:31 -05:00
Vignesh Raghavendra
443012dd31 soc: ti: k3-socinfo.c: Add JTAG ID for AM62PX
This adds JTAG ID info for the AM62PX so as to enable SoC detection in
kernel.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Praneeth Bajjuri <praneeth@ti.com>
Link: https://lore.kernel.org/r/20230811170127.250733-1-vigneshr@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
2023-08-11 16:01:09 -05:00
Siddharth Vadapalli
00e34c9498 soc: ti: k3-socinfo: Add entry for J784S4 SOC
J784S4 SoC's JTAG ID is 0xBB80.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Link: https://lore.kernel.org/r/20230314085500.10597-1-j-choudhary@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
2023-03-20 12:36:42 -05:00
Vignesh Raghavendra
c11b537e41 soc: ti: k3-socinfo: Add AM62Ax JTAG ID
Add JTAG ID entry to help identify AM62Ax SoC in kernel.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20221119152447.241166-1-vigneshr@ti.com
2022-11-22 16:08:34 -06:00
Vignesh Raghavendra
c65d68e7e9 soc: ti: k3-socinfo: Add AM62x JTAG ID
Add JTAG ID entry to help identify AM62x SoC in kernel.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20220225120239.1303821-2-vigneshr@ti.com
2022-02-28 05:35:19 -06:00
Aswath Govindraju
a34ff76a16 soc: ti: k3-socinfo: Add entry for J721S2 SoC family
J721S2 SoC's JTAG PARTNO is 0xBB75.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Kishon Vijay Abraham I <kishon@ti.com>
Link: https://lore.kernel.org/r/20211203120913.14737-1-a-govindraju@ti.com
2021-12-13 09:46:29 -06:00
Peter Ujfalusi
e643bd3809 soc: ti: k3-socinfo: Add entry for AM64X SoC family
It's JTAG PARTNO is 0xBB38.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2020-11-01 19:38:05 -08:00
Peter Ujfalusi
4f02044123 soc: ti: k3-socinfo: Add entry for J7200
Update K3 chipinfo driver to support new TI J7200 SoC.
It's JTAG PARTNO is 0xBB6D.

Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2020-09-11 21:47:39 -07:00
Grygorii Strashko
907a2b7e2f soc: ti: add k3 platforms chipid module driver
The Texas Instruments K3 Multicore SoC platforms have chipid module which
is represented by CTRLMMR_xxx_JTAGID register and contains information
about SoC id and revision.
 Bits:
  31-28 VARIANT Device variant
  27-12 PARTNO  Part number
  11-1  MFG     Indicates TI as manufacturer (0x17)
  1             Always 1

This patch adds corresponding driver to identify the TI K3 SoC family and
revision, and registers this information with the SoC bus. It is available
under /sys/devices/soc0/ for user space, and can be checked, where needed,
in Kernel using soc_device_match().

Identification is done by:
- checking MFG to be TI ID
 - retrieving Device variant (revision)
 - retrieving Part number and convert it to the family
 - retrieving machine from DT "/model"

Example J721E:
  # cat /sys/devices/soc0/{machine,family,revision}
  Texas Instruments K3 J721E SoC
  J721E
  SR1.0

Example AM65x:
  # cat /sys/devices/soc0/{machine,family,revision}
  Texas Instruments AM654 Base Board
  AM65X
  SR1.0

Cc: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2020-05-27 20:39:14 -07:00