ASoC: starfive: Add JH7110 TDM driver
Add tdm driver support for the StarFive JH7110 SoC. Signed-off-by: Walker Chen <walker.chen@starfivetech.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20230526145402.450-3-walker.chen@starfivetech.com Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Walker Chen
Mark Brown
parent
d9afe0d36c
commit
fd4762b6b5
@ -20127,6 +20127,12 @@ F: Documentation/devicetree/bindings/power/starfive*
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F: drivers/soc/starfive/jh71xx_pmu.c
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F: include/dt-bindings/power/starfive,jh7110-pmu.h
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STARFIVE JH7110 TDM DRIVER
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M: Walker Chen <walker.chen@starfivetech.com>
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S: Maintained
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F: Documentation/devicetree/bindings/sound/starfive,jh7110-tdm.yaml
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F: sound/soc/starfive/jh7110_tdm.c
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STARFIVE SOC DRIVERS
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M: Conor Dooley <conor@kernel.org>
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S: Maintained
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@ -92,6 +92,7 @@ source "sound/soc/sh/Kconfig"
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source "sound/soc/sof/Kconfig"
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source "sound/soc/spear/Kconfig"
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source "sound/soc/sprd/Kconfig"
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source "sound/soc/starfive/Kconfig"
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source "sound/soc/sti/Kconfig"
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source "sound/soc/stm/Kconfig"
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source "sound/soc/sunxi/Kconfig"
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@ -60,6 +60,7 @@ obj-$(CONFIG_SND_SOC) += sh/
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obj-$(CONFIG_SND_SOC) += sof/
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obj-$(CONFIG_SND_SOC) += spear/
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obj-$(CONFIG_SND_SOC) += sprd/
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obj-$(CONFIG_SND_SOC) += starfive/
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obj-$(CONFIG_SND_SOC) += sti/
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obj-$(CONFIG_SND_SOC) += stm/
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obj-$(CONFIG_SND_SOC) += sunxi/
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15
sound/soc/starfive/Kconfig
Normal file
15
sound/soc/starfive/Kconfig
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@ -0,0 +1,15 @@
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# SPDX-License-Identifier: GPL-2.0-only
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config SND_SOC_STARFIVE
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tristate "Audio support for StarFive SoC"
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depends on COMPILE_TEST || ARCH_STARFIVE
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help
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Say Y or M if you want to add support for codecs attached to
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the Starfive SoCs' Audio interfaces. You will also need to
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select the audio interfaces to support below.
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config SND_SOC_JH7110_TDM
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tristate "JH7110 TDM device driver"
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depends on HAVE_CLK && SND_SOC_STARFIVE
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select SND_SOC_GENERIC_DMAENGINE_PCM
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help
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Say Y or M if you want to add support for StarFive TDM driver.
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2
sound/soc/starfive/Makefile
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2
sound/soc/starfive/Makefile
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@ -0,0 +1,2 @@
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# StarFive Platform Support
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obj-$(CONFIG_SND_SOC_JH7110_TDM) += jh7110_tdm.o
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679
sound/soc/starfive/jh7110_tdm.c
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679
sound/soc/starfive/jh7110_tdm.c
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@ -0,0 +1,679 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* jh7110_tdm.c -- StarFive JH7110 TDM driver
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*
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* Copyright (C) 2023 StarFive Technology Co., Ltd.
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*
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* Author: Walker Chen <walker.chen@starfivetech.com>
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*/
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#include <linux/clk.h>
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#include <linux/device.h>
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#include <linux/dmaengine.h>
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#include <linux/module.h>
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#include <linux/of_irq.h>
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#include <linux/of_platform.h>
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#include <linux/pm_runtime.h>
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#include <linux/regmap.h>
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#include <linux/reset.h>
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#include <linux/types.h>
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#include <sound/dmaengine_pcm.h>
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#include <sound/initval.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/soc.h>
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#include <sound/soc-dai.h>
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#define TDM_PCMGBCR 0x00
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#define PCMGBCR_MASK 0x1e
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#define PCMGBCR_ENABLE BIT(0)
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#define PCMGBCR_TRITXEN BIT(4)
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#define CLKPOL_BIT 5
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#define TRITXEN_BIT 4
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#define ELM_BIT 3
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#define SYNCM_BIT 2
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#define MS_BIT 1
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#define TDM_PCMTXCR 0x04
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#define PCMTXCR_TXEN BIT(0)
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#define IFL_BIT 11
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#define WL_BIT 8
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#define SSCALE_BIT 4
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#define SL_BIT 2
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#define LRJ_BIT 1
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#define TDM_PCMRXCR 0x08
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#define PCMRXCR_RXEN BIT(0)
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#define PCMRXCR_RXSL_MASK 0xc
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#define PCMRXCR_RXSL_16BIT 0x4
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#define PCMRXCR_RXSL_32BIT 0x8
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#define PCMRXCR_SCALE_MASK 0xf0
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#define PCMRXCR_SCALE_1CH 0x10
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#define TDM_PCMDIV 0x0c
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#define JH7110_TDM_FIFO 0x170c0000
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#define JH7110_TDM_FIFO_DEPTH 32
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enum TDM_MASTER_SLAVE_MODE {
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TDM_AS_MASTER = 0,
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TDM_AS_SLAVE,
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};
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enum TDM_CLKPOL {
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/* tx raising and rx falling */
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TDM_TX_RASING_RX_FALLING = 0,
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/* tx falling and rx raising */
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TDM_TX_FALLING_RX_RASING,
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};
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enum TDM_ELM {
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/* only work while SYNCM=0 */
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TDM_ELM_LATE = 0,
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TDM_ELM_EARLY,
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};
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enum TDM_SYNCM {
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/* short frame sync */
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TDM_SYNCM_SHORT = 0,
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/* long frame sync */
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TDM_SYNCM_LONG,
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};
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enum TDM_IFL {
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/* FIFO to send or received : half-1/2, Quarter-1/4 */
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TDM_FIFO_HALF = 0,
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TDM_FIFO_QUARTER,
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};
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enum TDM_WL {
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/* send or received word length */
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TDM_8BIT_WORD_LEN = 0,
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TDM_16BIT_WORD_LEN,
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TDM_20BIT_WORD_LEN,
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TDM_24BIT_WORD_LEN,
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TDM_32BIT_WORD_LEN,
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};
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enum TDM_SL {
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/* send or received slot length */
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TDM_8BIT_SLOT_LEN = 0,
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TDM_16BIT_SLOT_LEN,
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TDM_32BIT_SLOT_LEN,
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};
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enum TDM_LRJ {
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/* left-justify or right-justify */
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TDM_RIGHT_JUSTIFY = 0,
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TDM_LEFT_JUSTIFT,
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};
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struct tdm_chan_cfg {
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enum TDM_IFL ifl;
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enum TDM_WL wl;
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unsigned char sscale;
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enum TDM_SL sl;
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enum TDM_LRJ lrj;
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unsigned char enable;
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};
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struct jh7110_tdm_dev {
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void __iomem *tdm_base;
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struct device *dev;
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struct clk_bulk_data clks[6];
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struct reset_control *resets;
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enum TDM_CLKPOL clkpolity;
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enum TDM_ELM elm;
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enum TDM_SYNCM syncm;
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enum TDM_MASTER_SLAVE_MODE ms_mode;
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struct tdm_chan_cfg tx;
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struct tdm_chan_cfg rx;
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u16 syncdiv;
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u32 samplerate;
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u32 pcmclk;
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/* data related to DMA transfers b/w tdm and DMAC */
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struct snd_dmaengine_dai_dma_data play_dma_data;
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struct snd_dmaengine_dai_dma_data capture_dma_data;
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u32 saved_pcmgbcr;
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u32 saved_pcmtxcr;
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u32 saved_pcmrxcr;
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u32 saved_pcmdiv;
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};
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static inline u32 jh7110_tdm_readl(struct jh7110_tdm_dev *tdm, u16 reg)
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{
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return readl_relaxed(tdm->tdm_base + reg);
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}
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static inline void jh7110_tdm_writel(struct jh7110_tdm_dev *tdm, u16 reg, u32 val)
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{
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writel_relaxed(val, tdm->tdm_base + reg);
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}
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static void jh7110_tdm_save_context(struct jh7110_tdm_dev *tdm,
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struct snd_pcm_substream *substream)
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{
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
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tdm->saved_pcmtxcr = jh7110_tdm_readl(tdm, TDM_PCMTXCR);
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else
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tdm->saved_pcmrxcr = jh7110_tdm_readl(tdm, TDM_PCMRXCR);
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}
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static void jh7110_tdm_start(struct jh7110_tdm_dev *tdm,
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struct snd_pcm_substream *substream)
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{
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u32 data;
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data = jh7110_tdm_readl(tdm, TDM_PCMGBCR);
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jh7110_tdm_writel(tdm, TDM_PCMGBCR, data | PCMGBCR_ENABLE);
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/* restore context */
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
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jh7110_tdm_writel(tdm, TDM_PCMTXCR, tdm->saved_pcmtxcr | PCMTXCR_TXEN);
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else
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jh7110_tdm_writel(tdm, TDM_PCMRXCR, tdm->saved_pcmrxcr | PCMRXCR_RXEN);
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}
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static void jh7110_tdm_stop(struct jh7110_tdm_dev *tdm,
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struct snd_pcm_substream *substream)
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{
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unsigned int val;
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
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val = jh7110_tdm_readl(tdm, TDM_PCMTXCR);
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val &= ~PCMTXCR_TXEN;
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jh7110_tdm_writel(tdm, TDM_PCMTXCR, val);
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} else {
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val = jh7110_tdm_readl(tdm, TDM_PCMRXCR);
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val &= ~PCMRXCR_RXEN;
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jh7110_tdm_writel(tdm, TDM_PCMRXCR, val);
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}
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}
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static int jh7110_tdm_syncdiv(struct jh7110_tdm_dev *tdm)
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{
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u32 sl, sscale, syncdiv;
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if (tdm->rx.sl >= tdm->tx.sl)
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sl = tdm->rx.sl;
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else
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sl = tdm->tx.sl;
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if (tdm->rx.sscale >= tdm->tx.sscale)
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sscale = tdm->rx.sscale;
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else
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sscale = tdm->tx.sscale;
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syncdiv = tdm->pcmclk / tdm->samplerate - 1;
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if ((syncdiv + 1) < (sl * sscale)) {
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dev_err(tdm->dev, "Failed to set syncdiv!\n");
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return -EINVAL;
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}
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if (tdm->syncm == TDM_SYNCM_LONG &&
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(tdm->rx.sscale <= 1 || tdm->tx.sscale <= 1) &&
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((syncdiv + 1) <= sl)) {
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dev_err(tdm->dev, "Wrong syncdiv! It must be (syncdiv+1) > max[tx.sl, rx.sl]\n");
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return -EINVAL;
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}
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jh7110_tdm_writel(tdm, TDM_PCMDIV, syncdiv);
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return 0;
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}
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static int jh7110_tdm_config(struct jh7110_tdm_dev *tdm,
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struct snd_pcm_substream *substream)
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{
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u32 datarx, datatx;
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int ret;
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ret = jh7110_tdm_syncdiv(tdm);
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if (ret)
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return ret;
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datarx = (tdm->rx.ifl << IFL_BIT) |
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(tdm->rx.wl << WL_BIT) |
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(tdm->rx.sscale << SSCALE_BIT) |
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(tdm->rx.sl << SL_BIT) |
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(tdm->rx.lrj << LRJ_BIT);
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datatx = (tdm->tx.ifl << IFL_BIT) |
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(tdm->tx.wl << WL_BIT) |
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(tdm->tx.sscale << SSCALE_BIT) |
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(tdm->tx.sl << SL_BIT) |
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(tdm->tx.lrj << LRJ_BIT);
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
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jh7110_tdm_writel(tdm, TDM_PCMTXCR, datatx);
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else
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jh7110_tdm_writel(tdm, TDM_PCMRXCR, datarx);
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return 0;
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}
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static void jh7110_tdm_clk_disable(struct jh7110_tdm_dev *tdm)
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{
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clk_bulk_disable_unprepare(ARRAY_SIZE(tdm->clks), tdm->clks);
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}
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static int jh7110_tdm_clk_enable(struct jh7110_tdm_dev *tdm)
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{
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int ret;
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ret = clk_bulk_prepare_enable(ARRAY_SIZE(tdm->clks), tdm->clks);
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if (ret) {
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dev_err(tdm->dev, "Failed to enable tdm clocks\n");
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return ret;
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}
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ret = reset_control_deassert(tdm->resets);
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if (ret) {
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dev_err(tdm->dev, "Failed to deassert tdm resets\n");
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goto dis_tdm_clk;
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}
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/* select tdm_ext clock as the clock source for tdm */
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ret = clk_set_parent(tdm->clks[5].clk, tdm->clks[4].clk);
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if (ret) {
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dev_err(tdm->dev, "Can't set extern clock source for clk_tdm\n");
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goto dis_tdm_clk;
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}
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return 0;
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dis_tdm_clk:
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clk_bulk_disable_unprepare(ARRAY_SIZE(tdm->clks), tdm->clks);
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return ret;
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}
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static int jh7110_tdm_runtime_suspend(struct device *dev)
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{
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struct jh7110_tdm_dev *tdm = dev_get_drvdata(dev);
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jh7110_tdm_clk_disable(tdm);
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return 0;
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}
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static int jh7110_tdm_runtime_resume(struct device *dev)
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{
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struct jh7110_tdm_dev *tdm = dev_get_drvdata(dev);
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return jh7110_tdm_clk_enable(tdm);
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}
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static int jh7110_tdm_system_suspend(struct device *dev)
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{
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struct jh7110_tdm_dev *tdm = dev_get_drvdata(dev);
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/* save context */
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tdm->saved_pcmgbcr = jh7110_tdm_readl(tdm, TDM_PCMGBCR);
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tdm->saved_pcmdiv = jh7110_tdm_readl(tdm, TDM_PCMDIV);
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return pm_runtime_force_suspend(dev);
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}
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static int jh7110_tdm_system_resume(struct device *dev)
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{
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struct jh7110_tdm_dev *tdm = dev_get_drvdata(dev);
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/* restore context */
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jh7110_tdm_writel(tdm, TDM_PCMGBCR, tdm->saved_pcmgbcr);
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jh7110_tdm_writel(tdm, TDM_PCMDIV, tdm->saved_pcmdiv);
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return pm_runtime_force_resume(dev);
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}
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static const struct snd_soc_component_driver jh7110_tdm_component = {
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.name = "jh7110-tdm",
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};
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static int jh7110_tdm_startup(struct snd_pcm_substream *substream,
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struct snd_soc_dai *cpu_dai)
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{
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struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
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struct snd_soc_dai_link *dai_link = rtd->dai_link;
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dai_link->stop_dma_first = 1;
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return 0;
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}
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static int jh7110_tdm_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params,
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struct snd_soc_dai *dai)
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{
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struct jh7110_tdm_dev *tdm = snd_soc_dai_get_drvdata(dai);
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int chan_wl, chan_sl, chan_nr;
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unsigned int data_width;
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unsigned int dma_bus_width;
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struct snd_dmaengine_dai_dma_data *dma_data = NULL;
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int ret;
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data_width = params_width(params);
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tdm->samplerate = params_rate(params);
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tdm->pcmclk = params_channels(params) * tdm->samplerate * data_width;
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switch (params_format(params)) {
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case SNDRV_PCM_FORMAT_S16_LE:
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chan_wl = TDM_16BIT_WORD_LEN;
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chan_sl = TDM_16BIT_SLOT_LEN;
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dma_bus_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
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break;
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case SNDRV_PCM_FORMAT_S32_LE:
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chan_wl = TDM_32BIT_WORD_LEN;
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chan_sl = TDM_32BIT_SLOT_LEN;
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dma_bus_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
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break;
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default:
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dev_err(tdm->dev, "tdm: unsupported PCM fmt");
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return -EINVAL;
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}
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chan_nr = params_channels(params);
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switch (chan_nr) {
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case 1:
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case 2:
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case 4:
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case 6:
|
||||
case 8:
|
||||
break;
|
||||
default:
|
||||
dev_err(tdm->dev, "channel not supported\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
|
||||
tdm->tx.wl = chan_wl;
|
||||
tdm->tx.sl = chan_sl;
|
||||
tdm->tx.sscale = chan_nr;
|
||||
tdm->play_dma_data.addr_width = dma_bus_width;
|
||||
dma_data = &tdm->play_dma_data;
|
||||
} else {
|
||||
tdm->rx.wl = chan_wl;
|
||||
tdm->rx.sl = chan_sl;
|
||||
tdm->rx.sscale = chan_nr;
|
||||
tdm->capture_dma_data.addr_width = dma_bus_width;
|
||||
dma_data = &tdm->capture_dma_data;
|
||||
}
|
||||
|
||||
snd_soc_dai_set_dma_data(dai, substream, dma_data);
|
||||
|
||||
ret = jh7110_tdm_config(tdm, substream);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
jh7110_tdm_save_context(tdm, substream);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int jh7110_tdm_trigger(struct snd_pcm_substream *substream,
|
||||
int cmd, struct snd_soc_dai *dai)
|
||||
{
|
||||
struct jh7110_tdm_dev *tdm = snd_soc_dai_get_drvdata(dai);
|
||||
int ret = 0;
|
||||
|
||||
switch (cmd) {
|
||||
case SNDRV_PCM_TRIGGER_START:
|
||||
case SNDRV_PCM_TRIGGER_RESUME:
|
||||
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
|
||||
jh7110_tdm_start(tdm, substream);
|
||||
break;
|
||||
|
||||
case SNDRV_PCM_TRIGGER_STOP:
|
||||
case SNDRV_PCM_TRIGGER_SUSPEND:
|
||||
case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
|
||||
jh7110_tdm_stop(tdm, substream);
|
||||
break;
|
||||
default:
|
||||
ret = -EINVAL;
|
||||
break;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int jh7110_tdm_set_dai_fmt(struct snd_soc_dai *cpu_dai,
|
||||
unsigned int fmt)
|
||||
{
|
||||
struct jh7110_tdm_dev *tdm = snd_soc_dai_get_drvdata(cpu_dai);
|
||||
unsigned int gbcr;
|
||||
|
||||
/* set master/slave audio interface */
|
||||
switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
|
||||
case SND_SOC_DAIFMT_BP_FP:
|
||||
/* cpu is master */
|
||||
tdm->ms_mode = TDM_AS_MASTER;
|
||||
break;
|
||||
case SND_SOC_DAIFMT_BC_FC:
|
||||
/* codec is master */
|
||||
tdm->ms_mode = TDM_AS_SLAVE;
|
||||
break;
|
||||
case SND_SOC_DAIFMT_BC_FP:
|
||||
case SND_SOC_DAIFMT_BP_FC:
|
||||
return -EINVAL;
|
||||
default:
|
||||
dev_dbg(tdm->dev, "dwc : Invalid clock provider format\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
gbcr = (tdm->clkpolity << CLKPOL_BIT) |
|
||||
(tdm->elm << ELM_BIT) |
|
||||
(tdm->syncm << SYNCM_BIT) |
|
||||
(tdm->ms_mode << MS_BIT);
|
||||
jh7110_tdm_writel(tdm, TDM_PCMGBCR, gbcr);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct snd_soc_dai_ops jh7110_tdm_dai_ops = {
|
||||
.startup = jh7110_tdm_startup,
|
||||
.hw_params = jh7110_tdm_hw_params,
|
||||
.trigger = jh7110_tdm_trigger,
|
||||
.set_fmt = jh7110_tdm_set_dai_fmt,
|
||||
};
|
||||
|
||||
static int jh7110_tdm_dai_probe(struct snd_soc_dai *dai)
|
||||
{
|
||||
struct jh7110_tdm_dev *tdm = snd_soc_dai_get_drvdata(dai);
|
||||
|
||||
snd_soc_dai_init_dma_data(dai, &tdm->play_dma_data, &tdm->capture_dma_data);
|
||||
snd_soc_dai_set_drvdata(dai, tdm);
|
||||
return 0;
|
||||
}
|
||||
|
||||
#define JH7110_TDM_RATES SNDRV_PCM_RATE_8000_48000
|
||||
|
||||
#define JH7110_TDM_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \
|
||||
SNDRV_PCM_FMTBIT_S32_LE)
|
||||
|
||||
static struct snd_soc_dai_driver jh7110_tdm_dai = {
|
||||
.name = "sf_tdm",
|
||||
.id = 0,
|
||||
.playback = {
|
||||
.stream_name = "Playback",
|
||||
.channels_min = 1,
|
||||
.channels_max = 8,
|
||||
.rates = JH7110_TDM_RATES,
|
||||
.formats = JH7110_TDM_FORMATS,
|
||||
},
|
||||
.capture = {
|
||||
.stream_name = "Capture",
|
||||
.channels_min = 1,
|
||||
.channels_max = 8,
|
||||
.rates = JH7110_TDM_RATES,
|
||||
.formats = JH7110_TDM_FORMATS,
|
||||
},
|
||||
.ops = &jh7110_tdm_dai_ops,
|
||||
.probe = jh7110_tdm_dai_probe,
|
||||
.symmetric_rate = 1,
|
||||
};
|
||||
|
||||
static const struct snd_pcm_hardware jh7110_pcm_hardware = {
|
||||
.info = (SNDRV_PCM_INFO_MMAP |
|
||||
SNDRV_PCM_INFO_MMAP_VALID |
|
||||
SNDRV_PCM_INFO_PAUSE |
|
||||
SNDRV_PCM_INFO_RESUME |
|
||||
SNDRV_PCM_INFO_INTERLEAVED |
|
||||
SNDRV_PCM_INFO_BLOCK_TRANSFER),
|
||||
.buffer_bytes_max = 192512,
|
||||
.period_bytes_min = 4096,
|
||||
.period_bytes_max = 32768,
|
||||
.periods_min = 1,
|
||||
.periods_max = 48,
|
||||
.fifo_size = 16,
|
||||
};
|
||||
|
||||
static const struct snd_dmaengine_pcm_config jh7110_dmaengine_pcm_config = {
|
||||
.pcm_hardware = &jh7110_pcm_hardware,
|
||||
.prepare_slave_config = snd_dmaengine_pcm_prepare_slave_config,
|
||||
.prealloc_buffer_size = 192512,
|
||||
};
|
||||
|
||||
static void jh7110_tdm_init_params(struct jh7110_tdm_dev *tdm)
|
||||
{
|
||||
tdm->clkpolity = TDM_TX_RASING_RX_FALLING;
|
||||
tdm->elm = TDM_ELM_LATE;
|
||||
tdm->syncm = TDM_SYNCM_SHORT;
|
||||
|
||||
tdm->rx.ifl = TDM_FIFO_HALF;
|
||||
tdm->tx.ifl = TDM_FIFO_HALF;
|
||||
tdm->rx.wl = TDM_16BIT_WORD_LEN;
|
||||
tdm->tx.wl = TDM_16BIT_WORD_LEN;
|
||||
tdm->rx.sscale = 2;
|
||||
tdm->tx.sscale = 2;
|
||||
tdm->rx.lrj = TDM_LEFT_JUSTIFT;
|
||||
tdm->tx.lrj = TDM_LEFT_JUSTIFT;
|
||||
|
||||
tdm->play_dma_data.addr = JH7110_TDM_FIFO;
|
||||
tdm->play_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
|
||||
tdm->play_dma_data.fifo_size = JH7110_TDM_FIFO_DEPTH / 2;
|
||||
tdm->play_dma_data.maxburst = 16;
|
||||
|
||||
tdm->capture_dma_data.addr = JH7110_TDM_FIFO;
|
||||
tdm->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
|
||||
tdm->capture_dma_data.fifo_size = JH7110_TDM_FIFO_DEPTH / 2;
|
||||
tdm->capture_dma_data.maxburst = 8;
|
||||
}
|
||||
|
||||
static int jh7110_tdm_clk_reset_get(struct platform_device *pdev,
|
||||
struct jh7110_tdm_dev *tdm)
|
||||
{
|
||||
int ret;
|
||||
|
||||
tdm->clks[0].id = "mclk_inner";
|
||||
tdm->clks[1].id = "tdm_ahb";
|
||||
tdm->clks[2].id = "tdm_apb";
|
||||
tdm->clks[3].id = "tdm_internal";
|
||||
tdm->clks[4].id = "tdm_ext";
|
||||
tdm->clks[5].id = "tdm";
|
||||
|
||||
ret = devm_clk_bulk_get(&pdev->dev, ARRAY_SIZE(tdm->clks), tdm->clks);
|
||||
if (ret) {
|
||||
dev_err(&pdev->dev, "Failed to get tdm clocks\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
tdm->resets = devm_reset_control_array_get_exclusive(&pdev->dev);
|
||||
if (IS_ERR_OR_NULL(tdm->resets)) {
|
||||
ret = PTR_ERR(tdm->resets);
|
||||
dev_err(&pdev->dev, "Failed to get tdm resets");
|
||||
return ret;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int jh7110_tdm_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct jh7110_tdm_dev *tdm;
|
||||
int ret;
|
||||
|
||||
tdm = devm_kzalloc(&pdev->dev, sizeof(*tdm), GFP_KERNEL);
|
||||
if (!tdm)
|
||||
return -ENOMEM;
|
||||
|
||||
tdm->tdm_base = devm_platform_ioremap_resource(pdev, 0);
|
||||
if (IS_ERR(tdm->tdm_base))
|
||||
return PTR_ERR(tdm->tdm_base);
|
||||
|
||||
tdm->dev = &pdev->dev;
|
||||
|
||||
ret = jh7110_tdm_clk_reset_get(pdev, tdm);
|
||||
if (ret) {
|
||||
dev_err(&pdev->dev, "Failed to enable audio-tdm clock\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
jh7110_tdm_init_params(tdm);
|
||||
|
||||
dev_set_drvdata(&pdev->dev, tdm);
|
||||
ret = devm_snd_soc_register_component(&pdev->dev, &jh7110_tdm_component,
|
||||
&jh7110_tdm_dai, 1);
|
||||
if (ret) {
|
||||
dev_err(&pdev->dev, "Failed to register dai\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = devm_snd_dmaengine_pcm_register(&pdev->dev,
|
||||
&jh7110_dmaengine_pcm_config,
|
||||
SND_DMAENGINE_PCM_FLAG_COMPAT);
|
||||
if (ret) {
|
||||
dev_err(&pdev->dev, "Could not register pcm: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
pm_runtime_enable(&pdev->dev);
|
||||
if (!pm_runtime_enabled(&pdev->dev)) {
|
||||
ret = jh7110_tdm_runtime_resume(&pdev->dev);
|
||||
if (ret)
|
||||
goto err_pm_disable;
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
err_pm_disable:
|
||||
pm_runtime_disable(&pdev->dev);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int jh7110_tdm_dev_remove(struct platform_device *pdev)
|
||||
{
|
||||
pm_runtime_disable(&pdev->dev);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct of_device_id jh7110_tdm_of_match[] = {
|
||||
{ .compatible = "starfive,jh7110-tdm", },
|
||||
{}
|
||||
};
|
||||
|
||||
MODULE_DEVICE_TABLE(of, jh7110_tdm_of_match);
|
||||
|
||||
static const struct dev_pm_ops jh7110_tdm_pm_ops = {
|
||||
RUNTIME_PM_OPS(jh7110_tdm_runtime_suspend,
|
||||
jh7110_tdm_runtime_resume, NULL)
|
||||
SYSTEM_SLEEP_PM_OPS(jh7110_tdm_system_suspend,
|
||||
jh7110_tdm_system_resume)
|
||||
};
|
||||
|
||||
static struct platform_driver jh7110_tdm_driver = {
|
||||
.driver = {
|
||||
.name = "jh7110-tdm",
|
||||
.of_match_table = jh7110_tdm_of_match,
|
||||
.pm = pm_ptr(&jh7110_tdm_pm_ops),
|
||||
},
|
||||
.probe = jh7110_tdm_probe,
|
||||
.remove = jh7110_tdm_dev_remove,
|
||||
};
|
||||
module_platform_driver(jh7110_tdm_driver);
|
||||
|
||||
MODULE_DESCRIPTION("StarFive JH7110 TDM ASoC Driver");
|
||||
MODULE_AUTHOR("Walker Chen <walker.chen@starfivetech.com>");
|
||||
MODULE_LICENSE("GPL");
|
||||
Loading…
Reference in New Issue
Block a user