sh: cache: Move forward declarations to <asm/cacheflush.h>
arch/sh/kernel/cpu/init.c:99:29: warning: no previous prototype for 'l2_cache_init' [-Wmissing-prototypes] arch/sh/kernel/cpu/sh4a/setup-sh7723.c:422:6: warning: no previous prototype for 'l2_cache_init' [-Wmissing-prototypes] arch/sh/kernel/cpu/sh4a/setup-sh7724.c:842:6: warning: no previous prototype for 'l2_cache_init' [-Wmissing-prototypes] arch/sh/mm/cache-j2.c:48:13: warning: no previous prototype for 'j2_cache_init' [-Wmissing-prototypes] arch/sh/mm/cache-sh2.c:85:13: warning: no previous prototype for 'sh2_cache_init' [-Wmissing-prototypes] arch/sh/mm/cache-sh2a.c:181:13: warning: no previous prototype for 'sh2a_cache_init' [-Wmissing-prototypes] arch/sh/mm/cache-sh3.c:90:13: warning: no previous prototype for 'sh3_cache_init' [-Wmissing-prototypes] arch/sh/mm/cache-sh4.c:384:13: warning: no previous prototype for 'sh4_cache_init' [-Wmissing-prototypes] arch/sh/mm/cache-shx3.c:18:13: warning: no previous prototype for 'shx3_cache_init' [-Wmissing-prototypes] arch/sh/mm/flush-sh4.c:106:13: warning: no previous prototype for 'sh4__flush_region_init' [-Wmissing-prototypes] arch/sh/mm/cache-sh7705.c:190:13: warning: no previous prototype for 'sh7705_cache_init' [-Wmissing-prototypes] Fix this by moving all cache-related forward declarations to <asm/cacheflush.h>, and by including the latter where needed. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de> Link: https://lore.kernel.org/r/f47ab87636d16db4c47bebe1bf62650045f61989.1709579038.git.geert+renesas@glider.be Signed-off-by: John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>
This commit is contained in:
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89256d73bb
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fcd9a89248
@ -104,6 +104,18 @@ void kunmap_coherent(void *kvaddr);
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void cpu_cache_init(void);
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void cpu_cache_init(void);
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void __weak l2_cache_init(void);
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void __weak j2_cache_init(void);
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void __weak sh2_cache_init(void);
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void __weak sh2a_cache_init(void);
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void __weak sh3_cache_init(void);
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void __weak shx3_cache_init(void);
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void __weak sh4_cache_init(void);
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void __weak sh7705_cache_init(void);
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void __weak sh4__flush_region_init(void);
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static inline void *sh_cacheop_vaddr(void *vaddr)
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static inline void *sh_cacheop_vaddr(void *vaddr)
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{
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{
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if (__in_29bit_mode())
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if (__in_29bit_mode())
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@ -14,9 +14,12 @@
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#include <linux/sh_timer.h>
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#include <linux/sh_timer.h>
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#include <linux/sh_intc.h>
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#include <linux/sh_intc.h>
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#include <linux/io.h>
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#include <linux/io.h>
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#include <asm/cacheflush.h>
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#include <asm/clock.h>
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#include <asm/clock.h>
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#include <asm/mmzone.h>
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#include <asm/mmzone.h>
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#include <asm/platform_early.h>
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#include <asm/platform_early.h>
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#include <cpu/sh7723.h>
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#include <cpu/sh7723.h>
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/* Serial */
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/* Serial */
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@ -21,6 +21,7 @@
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#include <linux/io.h>
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#include <linux/io.h>
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#include <linux/notifier.h>
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#include <linux/notifier.h>
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#include <asm/cacheflush.h>
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#include <asm/suspend.h>
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#include <asm/suspend.h>
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#include <asm/clock.h>
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#include <asm/clock.h>
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#include <asm/mmzone.h>
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#include <asm/mmzone.h>
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@ -376,8 +376,6 @@ static void __flush_cache_one(unsigned long addr, unsigned long phys,
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} while (--way_count != 0);
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} while (--way_count != 0);
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}
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}
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extern void __weak sh4__flush_region_init(void);
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/*
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/*
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* SH-4 has virtually indexed and physically tagged cache.
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* SH-4 has virtually indexed and physically tagged cache.
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*/
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*/
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@ -11,6 +11,7 @@
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#include <linux/kernel.h>
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#include <linux/kernel.h>
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#include <linux/io.h>
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#include <linux/io.h>
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#include <asm/cache.h>
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#include <asm/cache.h>
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#include <asm/cacheflush.h>
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#define CCR_CACHE_SNM 0x40000 /* Hardware-assisted synonym avoidance */
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#define CCR_CACHE_SNM 0x40000 /* Hardware-assisted synonym avoidance */
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#define CCR_CACHE_IBE 0x1000000 /* ICBI broadcast */
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#define CCR_CACHE_IBE 0x1000000 /* ICBI broadcast */
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@ -320,30 +320,20 @@ void __init cpu_cache_init(void)
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goto skip;
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goto skip;
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if (boot_cpu_data.type == CPU_J2) {
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if (boot_cpu_data.type == CPU_J2) {
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extern void __weak j2_cache_init(void);
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j2_cache_init();
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j2_cache_init();
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} else if (boot_cpu_data.family == CPU_FAMILY_SH2) {
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} else if (boot_cpu_data.family == CPU_FAMILY_SH2) {
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extern void __weak sh2_cache_init(void);
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sh2_cache_init();
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sh2_cache_init();
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}
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}
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if (boot_cpu_data.family == CPU_FAMILY_SH2A) {
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if (boot_cpu_data.family == CPU_FAMILY_SH2A) {
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extern void __weak sh2a_cache_init(void);
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sh2a_cache_init();
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sh2a_cache_init();
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}
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}
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if (boot_cpu_data.family == CPU_FAMILY_SH3) {
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if (boot_cpu_data.family == CPU_FAMILY_SH3) {
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extern void __weak sh3_cache_init(void);
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sh3_cache_init();
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sh3_cache_init();
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if ((boot_cpu_data.type == CPU_SH7705) &&
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if ((boot_cpu_data.type == CPU_SH7705) &&
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(boot_cpu_data.dcache.sets == 512)) {
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(boot_cpu_data.dcache.sets == 512)) {
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extern void __weak sh7705_cache_init(void);
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sh7705_cache_init();
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sh7705_cache_init();
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}
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}
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}
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}
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@ -351,14 +341,10 @@ void __init cpu_cache_init(void)
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if ((boot_cpu_data.family == CPU_FAMILY_SH4) ||
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if ((boot_cpu_data.family == CPU_FAMILY_SH4) ||
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(boot_cpu_data.family == CPU_FAMILY_SH4A) ||
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(boot_cpu_data.family == CPU_FAMILY_SH4A) ||
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(boot_cpu_data.family == CPU_FAMILY_SH4AL_DSP)) {
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(boot_cpu_data.family == CPU_FAMILY_SH4AL_DSP)) {
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extern void __weak sh4_cache_init(void);
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sh4_cache_init();
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sh4_cache_init();
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if ((boot_cpu_data.type == CPU_SH7786) ||
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if ((boot_cpu_data.type == CPU_SH7786) ||
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(boot_cpu_data.type == CPU_SHX3)) {
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(boot_cpu_data.type == CPU_SHX3)) {
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extern void __weak shx3_cache_init(void);
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shx3_cache_init();
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shx3_cache_init();
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}
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}
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}
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}
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