RISC-V: KVM: Allow Zfh[min] extensions for Guest/VM
We extend the KVM ISA extension ONE_REG interface to allow KVM user space to detect and enable Zfh[min] extensions for Guest/VM. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Signed-off-by: Anup Patel <anup@brainfault.org>
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@ -160,6 +160,8 @@ enum KVM_RISCV_ISA_EXT_ID {
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KVM_RISCV_ISA_EXT_ZVKSED,
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KVM_RISCV_ISA_EXT_ZVKSH,
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KVM_RISCV_ISA_EXT_ZVKT,
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KVM_RISCV_ISA_EXT_ZFH,
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KVM_RISCV_ISA_EXT_ZFHMIN,
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KVM_RISCV_ISA_EXT_MAX,
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};
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@ -47,6 +47,8 @@ static const unsigned long kvm_isa_ext_arr[] = {
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KVM_ISA_EXT_ARR(ZBKC),
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KVM_ISA_EXT_ARR(ZBKX),
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KVM_ISA_EXT_ARR(ZBS),
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KVM_ISA_EXT_ARR(ZFH),
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KVM_ISA_EXT_ARR(ZFHMIN),
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KVM_ISA_EXT_ARR(ZICBOM),
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KVM_ISA_EXT_ARR(ZICBOZ),
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KVM_ISA_EXT_ARR(ZICNTR),
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@ -118,6 +120,8 @@ static bool kvm_riscv_vcpu_isa_disable_allowed(unsigned long ext)
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case KVM_RISCV_ISA_EXT_ZBKC:
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case KVM_RISCV_ISA_EXT_ZBKX:
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case KVM_RISCV_ISA_EXT_ZBS:
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case KVM_RISCV_ISA_EXT_ZFH:
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case KVM_RISCV_ISA_EXT_ZFHMIN:
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case KVM_RISCV_ISA_EXT_ZICNTR:
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case KVM_RISCV_ISA_EXT_ZICOND:
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case KVM_RISCV_ISA_EXT_ZICSR:
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