kevin/linux
1
Fork 0
Code

x86/tsc: Switch to new Intel CPU model defines

Browse Source 
New CPU #defines encode vendor and family as well as model.

Signed-off-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Link: https://lore.kernel.org/all/20240424181517.41907-1-tony.luck%40intel.com
This commit is contained in:
Tony Luck 2024-04-24 11:15:17 -07:00 committed by Borislav Petkov (AMD)
parent 4db64279bc
commit f21b075b67
1 changed files with 3 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
arch/x86/kernel/tsc.c
View File

@ -26,7 +26,7 @@
#include <asm/x86_init.h> #include <asm/x86_init.h>
#include <asm/geode.h> #include <asm/geode.h>
#include <asm/apic.h> #include <asm/apic.h>
#include <asm/intel-family.h> #include <asm/cpu_device_id.h>
#include <asm/i8259.h> #include <asm/i8259.h>
#include <asm/uv/uv.h> #include <asm/uv/uv.h>
@ -682,7 +682,7 @@ unsigned long native_calibrate_tsc(void)
* clock. * clock.
*/ */
if (crystal_khz == 0 && if (crystal_khz == 0 &&
boot_cpu_data.x86_model == INTEL_FAM6_ATOM_GOLDMONT_D) boot_cpu_data.x86_vfm == INTEL_ATOM_GOLDMONT_D)
crystal_khz = 25000; crystal_khz = 25000;
/* /*
@ -713,7 +713,7 @@ unsigned long native_calibrate_tsc(void)
* For Atom SoCs TSC is the only reliable clocksource. * For Atom SoCs TSC is the only reliable clocksource.
* Mark TSC reliable so no watchdog on it. * Mark TSC reliable so no watchdog on it.
*/ */
if (boot_cpu_data.x86_model == INTEL_FAM6_ATOM_GOLDMONT) if (boot_cpu_data.x86_vfm == INTEL_ATOM_GOLDMONT)
setup_force_cpu_cap(X86_FEATURE_TSC_RELIABLE); setup_force_cpu_cap(X86_FEATURE_TSC_RELIABLE);
#ifdef CONFIG_X86_LOCAL_APIC #ifdef CONFIG_X86_LOCAL_APIC