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scsi: pm8001: Remove PM8001_USE_MSIX

The pm8001 driver does not compile if PM8001_USE_MSIX is not defined in
pm8001_sas.h because various fields and functions conditionally defined are
used unconditionally without a "#ifdef PM8001_USE_MSIX" protection.  This
macro is rather useless anyway and not convenient as diabling MSI-X use
requires recompiling the driver.

Remove this macro and replace it with the bool module parameter "use_msix"
which defaults to true. The use of MSI-X interrupts for an adapter is gated
by this module parameter for adapters that actually support MSI-X. The
"use_msix" boolean field is added to struct pm8001_hba_info and all code
defined depending on PM8001_USE_MSIX is modified to rely on
pm8001_hba_info->use_msix instead.

Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
Link: https://lore.kernel.org/r/20230911232745.325149-9-dlemoal@kernel.org
Acked-by: Jack Wang <jinpu.wang@ionos.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
This commit is contained in:
Damien Le Moal 2023-09-12 08:27:43 +09:00 committed by Martin K. Petersen
parent d93e1ac403
commit efa1fca450
4 changed files with 67 additions and 55 deletions

View File

@ -1188,13 +1188,14 @@ void pm8001_chip_iounmap(struct pm8001_hba_info *pm8001_ha)
static void static void
pm8001_chip_interrupt_enable(struct pm8001_hba_info *pm8001_ha, u8 vec) pm8001_chip_interrupt_enable(struct pm8001_hba_info *pm8001_ha, u8 vec)
{ {
#ifdef PM8001_USE_MSIX if (pm8001_ha->use_msix) {
pm8001_cw32(pm8001_ha, 0, MSIX_TABLE_BASE, MSIX_INTERRUPT_ENABLE); pm8001_cw32(pm8001_ha, 0, MSIX_TABLE_BASE,
MSIX_INTERRUPT_ENABLE);
pm8001_cw32(pm8001_ha, 0, MSGU_ODCR, 1); pm8001_cw32(pm8001_ha, 0, MSGU_ODCR, 1);
#else } else {
pm8001_cw32(pm8001_ha, 0, MSGU_ODMR, ODMR_CLEAR_ALL); pm8001_cw32(pm8001_ha, 0, MSGU_ODMR, ODMR_CLEAR_ALL);
pm8001_cw32(pm8001_ha, 0, MSGU_ODCR, ODCR_CLEAR_ALL); pm8001_cw32(pm8001_ha, 0, MSGU_ODCR, ODCR_CLEAR_ALL);
#endif }
} }
/** /**
@ -1205,11 +1206,11 @@ pm8001_chip_interrupt_enable(struct pm8001_hba_info *pm8001_ha, u8 vec)
static void static void
pm8001_chip_interrupt_disable(struct pm8001_hba_info *pm8001_ha, u8 vec) pm8001_chip_interrupt_disable(struct pm8001_hba_info *pm8001_ha, u8 vec)
{ {
#ifdef PM8001_USE_MSIX if (pm8001_ha->use_msix)
pm8001_cw32(pm8001_ha, 0, MSIX_TABLE_BASE, MSIX_INTERRUPT_DISABLE); pm8001_cw32(pm8001_ha, 0, MSIX_TABLE_BASE,
#else MSIX_INTERRUPT_DISABLE);
else
pm8001_cw32(pm8001_ha, 0, MSGU_ODMR, ODMR_MASK_ALL); pm8001_cw32(pm8001_ha, 0, MSGU_ODMR, ODMR_MASK_ALL);
#endif
} }
/** /**
@ -4252,16 +4253,15 @@ static int pm8001_chip_phy_ctl_req(struct pm8001_hba_info *pm8001_ha,
static u32 pm8001_chip_is_our_interrupt(struct pm8001_hba_info *pm8001_ha) static u32 pm8001_chip_is_our_interrupt(struct pm8001_hba_info *pm8001_ha)
{ {
#ifdef PM8001_USE_MSIX
return 1;
#else
u32 value; u32 value;
if (pm8001_ha->use_msix)
return 1;
value = pm8001_cr32(pm8001_ha, 0, MSGU_ODR); value = pm8001_cr32(pm8001_ha, 0, MSGU_ODR);
if (value) if (value)
return 1; return 1;
return 0; return 0;
#endif
} }
/** /**

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@ -56,6 +56,10 @@ MODULE_PARM_DESC(link_rate, "Enable link rate.\n"
" 4: Link rate 6.0G\n" " 4: Link rate 6.0G\n"
" 8: Link rate 12.0G\n"); " 8: Link rate 12.0G\n");
bool pm8001_use_msix = true;
module_param_named(use_msix, pm8001_use_msix, bool, 0444);
MODULE_PARM_DESC(zoned, "Use MSIX interrupts. Default: true");
static struct scsi_transport_template *pm8001_stt; static struct scsi_transport_template *pm8001_stt;
static int pm8001_init_ccb_tag(struct pm8001_hba_info *); static int pm8001_init_ccb_tag(struct pm8001_hba_info *);
@ -961,7 +965,6 @@ static int pm8001_configure_phy_settings(struct pm8001_hba_info *pm8001_ha)
} }
} }
#ifdef PM8001_USE_MSIX
/** /**
* pm8001_setup_msix - enable MSI-X interrupt * pm8001_setup_msix - enable MSI-X interrupt
* @pm8001_ha: our ha struct. * @pm8001_ha: our ha struct.
@ -1043,7 +1046,6 @@ static u32 pm8001_request_msix(struct pm8001_hba_info *pm8001_ha)
return rc; return rc;
} }
#endif
/** /**
* pm8001_request_irq - register interrupt * pm8001_request_irq - register interrupt
@ -1052,10 +1054,9 @@ static u32 pm8001_request_msix(struct pm8001_hba_info *pm8001_ha)
static u32 pm8001_request_irq(struct pm8001_hba_info *pm8001_ha) static u32 pm8001_request_irq(struct pm8001_hba_info *pm8001_ha)
{ {
struct pci_dev *pdev = pm8001_ha->pdev; struct pci_dev *pdev = pm8001_ha->pdev;
#ifdef PM8001_USE_MSIX
int rc; int rc;
if (pci_find_capability(pdev, PCI_CAP_ID_MSIX)) { if (pm8001_use_msix && pci_find_capability(pdev, PCI_CAP_ID_MSIX)) {
rc = pm8001_setup_msix(pm8001_ha); rc = pm8001_setup_msix(pm8001_ha);
if (rc) { if (rc) {
pm8001_dbg(pm8001_ha, FAIL, pm8001_dbg(pm8001_ha, FAIL,
@ -1063,14 +1064,22 @@ static u32 pm8001_request_irq(struct pm8001_hba_info *pm8001_ha)
return rc; return rc;
} }
if (pdev->msix_cap && pci_msi_enabled()) if (!pdev->msix_cap || !pci_msi_enabled())
return pm8001_request_msix(pm8001_ha); goto use_intx;
rc = pm8001_request_msix(pm8001_ha);
if (rc)
return rc;
pm8001_ha->use_msix = true;
return 0;
} }
use_intx:
/* Initialize the INT-X interrupt */
pm8001_dbg(pm8001_ha, INIT, "MSIX not supported!!!\n"); pm8001_dbg(pm8001_ha, INIT, "MSIX not supported!!!\n");
#endif pm8001_ha->use_msix = false;
/* initialize the INT-X interrupt */
pm8001_ha->irq_vector[0].irq_id = 0; pm8001_ha->irq_vector[0].irq_id = 0;
pm8001_ha->irq_vector[0].drv_inst = pm8001_ha; pm8001_ha->irq_vector[0].drv_inst = pm8001_ha;
@ -1081,10 +1090,10 @@ static u32 pm8001_request_irq(struct pm8001_hba_info *pm8001_ha)
static void pm8001_free_irq(struct pm8001_hba_info *pm8001_ha) static void pm8001_free_irq(struct pm8001_hba_info *pm8001_ha)
{ {
#ifdef PM8001_USE_MSIX
struct pci_dev *pdev = pm8001_ha->pdev; struct pci_dev *pdev = pm8001_ha->pdev;
int i; int i;
if (pm8001_ha->use_msix) {
for (i = 0; i < pm8001_ha->number_of_intr; i++) for (i = 0; i < pm8001_ha->number_of_intr; i++)
synchronize_irq(pci_irq_vector(pdev, i)); synchronize_irq(pci_irq_vector(pdev, i));
@ -1092,9 +1101,11 @@ static void pm8001_free_irq(struct pm8001_hba_info *pm8001_ha)
free_irq(pci_irq_vector(pdev, i), &pm8001_ha->irq_vector[i]); free_irq(pci_irq_vector(pdev, i), &pm8001_ha->irq_vector[i]);
pci_free_irq_vectors(pdev); pci_free_irq_vectors(pdev);
#else return;
}
/* INT-X */
free_irq(pm8001_ha->irq, pm8001_ha->sas); free_irq(pm8001_ha->irq, pm8001_ha->sas);
#endif
} }
/** /**

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@ -83,8 +83,9 @@ do { \
pm8001_info(HBA, fmt, ##__VA_ARGS__); \ pm8001_info(HBA, fmt, ##__VA_ARGS__); \
} while (0) } while (0)
extern bool pm8001_use_msix;
#define PM8001_USE_TASKLET #define PM8001_USE_TASKLET
#define PM8001_USE_MSIX
#define PM8001_READ_VPD #define PM8001_READ_VPD
@ -520,11 +521,11 @@ struct pm8001_hba_info {
struct pm8001_device *devices; struct pm8001_device *devices;
struct pm8001_ccb_info *ccb_info; struct pm8001_ccb_info *ccb_info;
u32 ccb_count; u32 ccb_count;
#ifdef PM8001_USE_MSIX
bool use_msix;
int number_of_intr;/*will be used in remove()*/ int number_of_intr;/*will be used in remove()*/
char intr_drvname[PM8001_MAX_MSIX_VEC] char intr_drvname[PM8001_MAX_MSIX_VEC]
[PM8001_NAME_LENGTH+1+3+1]; [PM8001_NAME_LENGTH+1+3+1];
#endif
#ifdef PM8001_USE_TASKLET #ifdef PM8001_USE_TASKLET
struct tasklet_struct tasklet[PM8001_MAX_MSIX_VEC]; struct tasklet_struct tasklet[PM8001_MAX_MSIX_VEC];
#endif #endif

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@ -1722,16 +1722,16 @@ static void pm80xx_hw_chip_rst(struct pm8001_hba_info *pm8001_ha)
static void static void
pm80xx_chip_interrupt_enable(struct pm8001_hba_info *pm8001_ha, u8 vec) pm80xx_chip_interrupt_enable(struct pm8001_hba_info *pm8001_ha, u8 vec)
{ {
#ifdef PM8001_USE_MSIX if (!pm8001_ha->use_msix) {
pm8001_cw32(pm8001_ha, 0, MSGU_ODMR, ODMR_CLEAR_ALL);
pm8001_cw32(pm8001_ha, 0, MSGU_ODCR, ODCR_CLEAR_ALL);
return;
}
if (vec < 32) if (vec < 32)
pm8001_cw32(pm8001_ha, 0, MSGU_ODMR_CLR, 1U << vec); pm8001_cw32(pm8001_ha, 0, MSGU_ODMR_CLR, 1U << vec);
else else
pm8001_cw32(pm8001_ha, 0, MSGU_ODMR_CLR_U, pm8001_cw32(pm8001_ha, 0, MSGU_ODMR_CLR_U, 1U << (vec - 32));
1U << (vec - 32));
#else
pm8001_cw32(pm8001_ha, 0, MSGU_ODMR, ODMR_CLEAR_ALL);
pm8001_cw32(pm8001_ha, 0, MSGU_ODCR, ODCR_CLEAR_ALL);
#endif
} }
/** /**
@ -1742,19 +1742,20 @@ pm80xx_chip_interrupt_enable(struct pm8001_hba_info *pm8001_ha, u8 vec)
static void static void
pm80xx_chip_interrupt_disable(struct pm8001_hba_info *pm8001_ha, u8 vec) pm80xx_chip_interrupt_disable(struct pm8001_hba_info *pm8001_ha, u8 vec)
{ {
#ifdef PM8001_USE_MSIX if (!pm8001_ha->use_msix) {
pm8001_cw32(pm8001_ha, 0, MSGU_ODMR_CLR, ODMR_MASK_ALL);
return;
}
if (vec == 0xFF) { if (vec == 0xFF) {
/* disable all vectors 0-31, 32-63 */ /* disable all vectors 0-31, 32-63 */
pm8001_cw32(pm8001_ha, 0, MSGU_ODMR, 0xFFFFFFFF); pm8001_cw32(pm8001_ha, 0, MSGU_ODMR, 0xFFFFFFFF);
pm8001_cw32(pm8001_ha, 0, MSGU_ODMR_U, 0xFFFFFFFF); pm8001_cw32(pm8001_ha, 0, MSGU_ODMR_U, 0xFFFFFFFF);
} else if (vec < 32) } else if (vec < 32) {
pm8001_cw32(pm8001_ha, 0, MSGU_ODMR, 1U << vec); pm8001_cw32(pm8001_ha, 0, MSGU_ODMR, 1U << vec);
else } else {
pm8001_cw32(pm8001_ha, 0, MSGU_ODMR_U, pm8001_cw32(pm8001_ha, 0, MSGU_ODMR_U, 1U << (vec - 32));
1U << (vec - 32)); }
#else
pm8001_cw32(pm8001_ha, 0, MSGU_ODMR_CLR, ODMR_MASK_ALL);
#endif
} }
/** /**
@ -4781,16 +4782,15 @@ static int pm80xx_chip_phy_ctl_req(struct pm8001_hba_info *pm8001_ha,
static u32 pm80xx_chip_is_our_interrupt(struct pm8001_hba_info *pm8001_ha) static u32 pm80xx_chip_is_our_interrupt(struct pm8001_hba_info *pm8001_ha)
{ {
#ifdef PM8001_USE_MSIX
return 1;
#else
u32 value; u32 value;
if (pm8001_ha->use_msix)
return 1;
value = pm8001_cr32(pm8001_ha, 0, MSGU_ODR); value = pm8001_cr32(pm8001_ha, 0, MSGU_ODR);
if (value) if (value)
return 1; return 1;
return 0; return 0;
#endif
} }
/** /**