iommu/amd: Enable Guest Translation after reading IOMMU feature register
Commit8e01797331
("iommu/amd: Enable Guest Translation before registering devices") moved IOMMU Guest Translation (GT) enablement to early init path. It does feature check based on Global EFR value (got from ACPI IVRS table). Later it adjusts EFR value based on IOMMU feature register (late_iommu_features_init()). It seems in some systems BIOS doesn't set gloabl EFR value properly. This is causing mismatch. Hence move IOMMU GT enablement after late_iommu_features_init() so that it does check based on IOMMU EFR value. Fixes:8e01797331
("iommu/amd: Enable Guest Translation before registering devices") Reported-by: Klara Modin <klarasmodin@gmail.com> Closes: https://lore.kernel.org/linux-iommu/333e6eb6-361c-4afb-8107-2573324bf689@gmail.com/ Signed-off-by: Vasant Hegde <vasant.hegde@amd.com> Tested-by: Klara Modin <klarasmodin@gmail.com> Link: https://lore.kernel.org/r/20240506082039.7575-1-vasant.hegde@amd.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
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@ -2046,6 +2046,8 @@ static int __init iommu_init_pci(struct amd_iommu *iommu)
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amd_iommu_max_glx_val = glxval;
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else
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amd_iommu_max_glx_val = min(amd_iommu_max_glx_val, glxval);
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iommu_enable_gt(iommu);
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}
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if (check_feature(FEATURE_PPR) && amd_iommu_alloc_ppr_log(iommu))
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@ -2732,7 +2734,6 @@ static void early_enable_iommu(struct amd_iommu *iommu)
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iommu_enable_command_buffer(iommu);
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iommu_enable_event_buffer(iommu);
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iommu_set_exclusion_range(iommu);
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iommu_enable_gt(iommu);
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iommu_enable_ga(iommu);
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iommu_enable_xt(iommu);
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iommu_enable_irtcachedis(iommu);
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@ -2789,7 +2790,6 @@ static void early_enable_iommus(void)
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iommu_disable_irtcachedis(iommu);
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iommu_enable_command_buffer(iommu);
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iommu_enable_event_buffer(iommu);
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iommu_enable_gt(iommu);
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iommu_enable_ga(iommu);
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iommu_enable_xt(iommu);
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iommu_enable_irtcachedis(iommu);
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