drm/mediatek: dsi: Add dsi per-frame lp code for mt8188
Adding the per-frame lp function of mt8188, which can keep HFP in HS and reduce the time required for each line to enter and exit low power. Per Frame LP: |<----------One Active Frame-------->| --______________________________________----___________________ ^HSA+HBP^^RGB^^HFP^^HSA+HBP^^RGB^^HFP^ ^HSA+HBP^^RGB^^HFP^ Per Line LP: |<---------------One Active Frame----------->| --______________--______________--______________----______________ ^HSA+HBP^^RGB^ ^HSA+HBP^^RGB^ ^HSA+HBP^^RGB^ ^HSA+HBP^^RGB^ Signed-off-by: Shuijing Li <shuijing.li@mediatek.com> Reviewed-by: CK Hu <ck.hu@mediatek.com> Link: https://patchwork.kernel.org/project/dri-devel/patch/20240826060654.24038-1-shuijing.li@mediatek.com/ Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
This commit is contained in:
Shuijing Li
Chun-Kuang Hu
parent
00335fc7cc
commit
d79ae4766c
@ -88,12 +88,15 @@
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#define DSI_HSA_WC 0x50
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#define DSI_HBP_WC 0x54
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#define DSI_HFP_WC 0x58
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#define HFP_HS_VB_PS_WC GENMASK(30, 16)
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#define HFP_HS_EN BIT(31)
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#define DSI_CMDQ_SIZE 0x60
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#define CMDQ_SIZE 0x3f
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#define CMDQ_SIZE_SEL BIT(15)
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#define DSI_HSTX_CKL_WC 0x64
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#define HSTX_CKL_WC GENMASK(15, 2)
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#define DSI_RX_DATA0 0x74
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#define DSI_RX_DATA1 0x78
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@ -187,6 +190,7 @@ struct mtk_dsi_driver_data {
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bool has_shadow_ctl;
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bool has_size_ctl;
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bool cmdq_long_packet_ctl;
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bool support_per_frame_lp;
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};
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struct mtk_dsi {
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@ -426,7 +430,75 @@ static void mtk_dsi_ps_control(struct mtk_dsi *dsi, bool config_vact)
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writel(ps_val, dsi->regs + DSI_PSCTRL);
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}
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static void mtk_dsi_config_vdo_timing(struct mtk_dsi *dsi)
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static void mtk_dsi_config_vdo_timing_per_frame_lp(struct mtk_dsi *dsi)
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{
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u32 horizontal_sync_active_byte;
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u32 horizontal_backporch_byte;
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u32 horizontal_frontporch_byte;
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u32 hfp_byte_adjust, v_active_adjust;
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u32 cklp_wc_min_adjust, cklp_wc_max_adjust;
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u32 dsi_tmp_buf_bpp;
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unsigned int da_hs_trail;
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unsigned int ps_wc, hs_vb_ps_wc;
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u32 v_active_roundup, hstx_cklp_wc;
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u32 hstx_cklp_wc_max, hstx_cklp_wc_min;
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struct videomode *vm = &dsi->vm;
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if (dsi->format == MIPI_DSI_FMT_RGB565)
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dsi_tmp_buf_bpp = 2;
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else
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dsi_tmp_buf_bpp = 3;
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da_hs_trail = dsi->phy_timing.da_hs_trail;
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ps_wc = vm->hactive * dsi_tmp_buf_bpp;
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if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE) {
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horizontal_sync_active_byte =
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vm->hsync_len * dsi_tmp_buf_bpp - 10;
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horizontal_backporch_byte =
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vm->hback_porch * dsi_tmp_buf_bpp - 10;
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hfp_byte_adjust = 12;
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v_active_adjust = 32 + horizontal_sync_active_byte;
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cklp_wc_min_adjust = 12 + 2 + 4 + horizontal_sync_active_byte;
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cklp_wc_max_adjust = 20 + 6 + 4 + horizontal_sync_active_byte;
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} else {
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horizontal_sync_active_byte = vm->hsync_len * dsi_tmp_buf_bpp - 4;
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horizontal_backporch_byte = (vm->hback_porch + vm->hsync_len) *
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dsi_tmp_buf_bpp - 10;
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cklp_wc_min_adjust = 4;
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cklp_wc_max_adjust = 12 + 4 + 4;
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if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_BURST) {
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hfp_byte_adjust = 18;
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v_active_adjust = 28;
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} else {
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hfp_byte_adjust = 12;
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v_active_adjust = 22;
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}
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}
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horizontal_frontporch_byte = vm->hfront_porch * dsi_tmp_buf_bpp - hfp_byte_adjust;
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v_active_roundup = (v_active_adjust + horizontal_backporch_byte + ps_wc +
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horizontal_frontporch_byte) % dsi->lanes;
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if (v_active_roundup)
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horizontal_backporch_byte += dsi->lanes - v_active_roundup;
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hstx_cklp_wc_min = (DIV_ROUND_UP(cklp_wc_min_adjust, dsi->lanes) + da_hs_trail + 1)
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* dsi->lanes / 6 - 1;
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hstx_cklp_wc_max = (DIV_ROUND_UP((cklp_wc_max_adjust + horizontal_backporch_byte +
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ps_wc), dsi->lanes) + da_hs_trail + 1) * dsi->lanes / 6 - 1;
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hstx_cklp_wc = FIELD_PREP(HSTX_CKL_WC, (hstx_cklp_wc_min + hstx_cklp_wc_max) / 2);
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writel(hstx_cklp_wc, dsi->regs + DSI_HSTX_CKL_WC);
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hs_vb_ps_wc = ps_wc - (dsi->phy_timing.lpx + dsi->phy_timing.da_hs_exit +
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dsi->phy_timing.da_hs_prepare + dsi->phy_timing.da_hs_zero + 2) * dsi->lanes;
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horizontal_frontporch_byte |= FIELD_PREP(HFP_HS_EN, 1) |
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FIELD_PREP(HFP_HS_VB_PS_WC, hs_vb_ps_wc);
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writel(horizontal_sync_active_byte, dsi->regs + DSI_HSA_WC);
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writel(horizontal_backporch_byte, dsi->regs + DSI_HBP_WC);
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writel(horizontal_frontporch_byte, dsi->regs + DSI_HFP_WC);
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}
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static void mtk_dsi_config_vdo_timing_per_line_lp(struct mtk_dsi *dsi)
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{
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u32 horizontal_sync_active_byte;
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u32 horizontal_backporch_byte;
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@ -436,7 +508,6 @@ static void mtk_dsi_config_vdo_timing(struct mtk_dsi *dsi)
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u32 dsi_tmp_buf_bpp, data_phy_cycles;
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u32 delta;
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struct mtk_phy_timing *timing = &dsi->phy_timing;
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struct videomode *vm = &dsi->vm;
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if (dsi->format == MIPI_DSI_FMT_RGB565)
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@ -444,16 +515,6 @@ static void mtk_dsi_config_vdo_timing(struct mtk_dsi *dsi)
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else
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dsi_tmp_buf_bpp = 3;
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writel(vm->vsync_len, dsi->regs + DSI_VSA_NL);
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writel(vm->vback_porch, dsi->regs + DSI_VBP_NL);
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writel(vm->vfront_porch, dsi->regs + DSI_VFP_NL);
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writel(vm->vactive, dsi->regs + DSI_VACT_NL);
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if (dsi->driver_data->has_size_ctl)
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writel(FIELD_PREP(DSI_HEIGHT, vm->vactive) |
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FIELD_PREP(DSI_WIDTH, vm->hactive),
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dsi->regs + DSI_SIZE_CON);
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horizontal_sync_active_byte = (vm->hsync_len * dsi_tmp_buf_bpp - 10);
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if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE)
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@ -499,6 +560,26 @@ static void mtk_dsi_config_vdo_timing(struct mtk_dsi *dsi)
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writel(horizontal_sync_active_byte, dsi->regs + DSI_HSA_WC);
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writel(horizontal_backporch_byte, dsi->regs + DSI_HBP_WC);
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writel(horizontal_frontporch_byte, dsi->regs + DSI_HFP_WC);
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}
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static void mtk_dsi_config_vdo_timing(struct mtk_dsi *dsi)
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{
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struct videomode *vm = &dsi->vm;
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writel(vm->vsync_len, dsi->regs + DSI_VSA_NL);
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writel(vm->vback_porch, dsi->regs + DSI_VBP_NL);
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writel(vm->vfront_porch, dsi->regs + DSI_VFP_NL);
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writel(vm->vactive, dsi->regs + DSI_VACT_NL);
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if (dsi->driver_data->has_size_ctl)
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writel(FIELD_PREP(DSI_HEIGHT, vm->vactive) |
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FIELD_PREP(DSI_WIDTH, vm->hactive),
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dsi->regs + DSI_SIZE_CON);
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if (dsi->driver_data->support_per_frame_lp)
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mtk_dsi_config_vdo_timing_per_frame_lp(dsi);
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else
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mtk_dsi_config_vdo_timing_per_line_lp(dsi);
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mtk_dsi_ps_control(dsi, false);
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}
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@ -1197,6 +1278,7 @@ static const struct mtk_dsi_driver_data mt8188_dsi_driver_data = {
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.has_shadow_ctl = true,
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.has_size_ctl = true,
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.cmdq_long_packet_ctl = true,
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.support_per_frame_lp = true,
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};
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static const struct of_device_id mtk_dsi_of_match[] = {
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