gpio: davinci: drop platform data support
There are no more any board files that use the platform data for gpio-davinci. We can remove the header defining it and port the code to no longer store any context in pdata. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20240819151705.37258-1-brgl@bgdev.pl Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
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@ -18,7 +18,6 @@
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#include <linux/of.h>
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#include <linux/pinctrl/consumer.h>
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#include <linux/platform_device.h>
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#include <linux/platform_data/gpio-davinci.h>
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#include <linux/property.h>
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#include <linux/irqchip/chained_irq.h>
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#include <linux/spinlock.h>
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@ -154,74 +153,37 @@ davinci_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
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value ? &g->set_data : &g->clr_data);
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}
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static struct davinci_gpio_platform_data *
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davinci_gpio_get_pdata(struct platform_device *pdev)
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{
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struct device_node *dn = pdev->dev.of_node;
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struct davinci_gpio_platform_data *pdata;
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int ret;
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u32 val;
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if (!IS_ENABLED(CONFIG_OF) || !pdev->dev.of_node)
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return dev_get_platdata(&pdev->dev);
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pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
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if (!pdata)
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return NULL;
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ret = of_property_read_u32(dn, "ti,ngpio", &val);
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if (ret)
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goto of_err;
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pdata->ngpio = val;
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ret = of_property_read_u32(dn, "ti,davinci-gpio-unbanked", &val);
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if (ret)
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goto of_err;
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pdata->gpio_unbanked = val;
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return pdata;
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of_err:
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dev_err(&pdev->dev, "Populating pdata from DT failed: err %d\n", ret);
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return NULL;
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}
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static int davinci_gpio_probe(struct platform_device *pdev)
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{
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int bank, i, ret = 0;
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unsigned int ngpio, nbank, nirq;
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unsigned int ngpio, nbank, nirq, gpio_unbanked;
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struct davinci_gpio_controller *chips;
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struct davinci_gpio_platform_data *pdata;
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struct device *dev = &pdev->dev;
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pdata = davinci_gpio_get_pdata(pdev);
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if (!pdata) {
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dev_err(dev, "No platform data found\n");
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return -EINVAL;
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}
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dev->platform_data = pdata;
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struct device_node *dn = dev_of_node(dev);
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/*
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* The gpio banks conceptually expose a segmented bitmap,
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* and "ngpio" is one more than the largest zero-based
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* bit index that's valid.
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*/
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ngpio = pdata->ngpio;
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if (ngpio == 0) {
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dev_err(dev, "How many GPIOs?\n");
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return -EINVAL;
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}
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ret = of_property_read_u32(dn, "ti,ngpio", &ngpio);
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if (ret)
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return dev_err_probe(dev, ret, "Failed to get the number of GPIOs\n");
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if (ngpio == 0)
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return dev_err_probe(dev, -EINVAL, "How many GPIOs?\n");
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/*
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* If there are unbanked interrupts then the number of
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* interrupts is equal to number of gpios else all are banked so
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* number of interrupts is equal to number of banks(each with 16 gpios)
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*/
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if (pdata->gpio_unbanked)
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nirq = pdata->gpio_unbanked;
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ret = of_property_read_u32(dn, "ti,davinci-gpio-unbanked",
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&gpio_unbanked);
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if (ret)
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return dev_err_probe(dev, ret, "Failed to get the unbanked GPIOs property\n");
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if (gpio_unbanked)
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nirq = gpio_unbanked;
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else
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nirq = DIV_ROUND_UP(ngpio, 16);
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@ -252,7 +214,7 @@ static int davinci_gpio_probe(struct platform_device *pdev)
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chips->chip.set = davinci_gpio_set;
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chips->chip.ngpio = ngpio;
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chips->chip.base = pdata->no_auto_base ? pdata->base : -1;
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chips->chip.base = -1;
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#ifdef CONFIG_OF_GPIO
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chips->chip.parent = dev;
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@ -261,6 +223,8 @@ static int davinci_gpio_probe(struct platform_device *pdev)
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#endif
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spin_lock_init(&chips->lock);
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chips->gpio_unbanked = gpio_unbanked;
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nbank = DIV_ROUND_UP(ngpio, 32);
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for (bank = 0; bank < nbank; bank++)
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chips->regs[bank] = gpio_base + offset_array[bank];
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@ -488,7 +452,6 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev)
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unsigned ngpio;
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struct device *dev = &pdev->dev;
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struct davinci_gpio_controller *chips = platform_get_drvdata(pdev);
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struct davinci_gpio_platform_data *pdata = dev->platform_data;
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struct davinci_gpio_regs __iomem *g;
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struct irq_domain *irq_domain = NULL;
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struct irq_chip *irq_chip;
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@ -502,7 +465,7 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev)
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if (dev->of_node)
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gpio_get_irq_chip = (gpio_get_irq_chip_cb_t)device_get_match_data(dev);
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ngpio = pdata->ngpio;
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ngpio = chips->chip.ngpio;
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clk = devm_clk_get(dev, "gpio");
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if (IS_ERR(clk)) {
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@ -514,7 +477,7 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev)
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if (ret)
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return ret;
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if (!pdata->gpio_unbanked) {
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if (chips->gpio_unbanked) {
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irq = devm_irq_alloc_descs(dev, -1, 0, ngpio, 0);
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if (irq < 0) {
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dev_err(dev, "Couldn't allocate IRQ numbers\n");
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@ -546,11 +509,11 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev)
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* controller only handling trigger modes. We currently assume no
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* IRQ mux conflicts; gpio_irq_type_unbanked() is only for GPIOs.
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*/
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if (pdata->gpio_unbanked) {
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if (chips->gpio_unbanked) {
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/* pass "bank 0" GPIO IRQs to AINTC */
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chips->chip.to_irq = gpio_to_irq_unbanked;
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chips->gpio_unbanked = pdata->gpio_unbanked;
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binten = GENMASK(pdata->gpio_unbanked / 16, 0);
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binten = GENMASK(chips->gpio_unbanked / 16, 0);
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/* AINTC handles mask/unmask; GPIO handles triggering */
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irq = chips->irqs[0];
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@ -564,7 +527,7 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev)
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writel_relaxed(~0, &g->set_rising);
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/* set the direct IRQs up to use that irqchip */
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for (gpio = 0; gpio < pdata->gpio_unbanked; gpio++) {
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for (gpio = 0; gpio < chips->gpio_unbanked; gpio++) {
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irq_set_chip(chips->irqs[gpio], irq_chip);
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irq_set_handler_data(chips->irqs[gpio], chips);
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irq_set_status_flags(chips->irqs[gpio],
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@ -675,8 +638,7 @@ static void davinci_gpio_restore_context(struct davinci_gpio_controller *chips,
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static int davinci_gpio_suspend(struct device *dev)
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{
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struct davinci_gpio_controller *chips = dev_get_drvdata(dev);
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struct davinci_gpio_platform_data *pdata = dev_get_platdata(dev);
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u32 nbank = DIV_ROUND_UP(pdata->ngpio, 32);
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u32 nbank = DIV_ROUND_UP(chips->chip.ngpio, 32);
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davinci_gpio_save_context(chips, nbank);
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@ -686,8 +648,7 @@ static int davinci_gpio_suspend(struct device *dev)
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static int davinci_gpio_resume(struct device *dev)
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{
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struct davinci_gpio_controller *chips = dev_get_drvdata(dev);
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struct davinci_gpio_platform_data *pdata = dev_get_platdata(dev);
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u32 nbank = DIV_ROUND_UP(pdata->ngpio, 32);
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u32 nbank = DIV_ROUND_UP(chips->chip.ngpio, 32);
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davinci_gpio_restore_context(chips, nbank);
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@ -1,21 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* DaVinci GPIO Platform Related Defines
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*
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* Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
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*/
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#ifndef __DAVINCI_GPIO_PLATFORM_H
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#define __DAVINCI_GPIO_PLATFORM_H
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struct davinci_gpio_platform_data {
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bool no_auto_base;
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u32 base;
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u32 ngpio;
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u32 gpio_unbanked;
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};
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/* Convert GPIO signal to GPIO pin number */
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#define GPIO_TO_PIN(bank, gpio) (16 * (bank) + (gpio))
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#endif
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