net: wan: Add support for QMC HDLC
The QMC HDLC driver provides support for HDLC using the QMC (QUICC Multichannel Controller) to transfer the HDLC data. Signed-off-by: Herve Codina <herve.codina@bootlin.com> Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu> Acked-by: Jakub Kicinski <kuba@kernel.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Herve Codina
David S. Miller
parent
f541fd7adf
commit
d0f2258e79
@ -197,6 +197,18 @@ config FARSYNC
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To compile this driver as a module, choose M here: the
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To compile this driver as a module, choose M here: the
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module will be called farsync.
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module will be called farsync.
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config FSL_QMC_HDLC
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tristate "Freescale QMC HDLC support"
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depends on HDLC
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depends on CPM_QMC
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help
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HDLC support using the Freescale QUICC Multichannel Controller (QMC).
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To compile this driver as a module, choose M here: the
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module will be called fsl_qmc_hdlc.
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If unsure, say N.
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config FSL_UCC_HDLC
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config FSL_UCC_HDLC
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tristate "Freescale QUICC Engine HDLC support"
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tristate "Freescale QUICC Engine HDLC support"
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depends on HDLC
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depends on HDLC
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@ -25,6 +25,7 @@ obj-$(CONFIG_WANXL) += wanxl.o
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obj-$(CONFIG_PCI200SYN) += pci200syn.o
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obj-$(CONFIG_PCI200SYN) += pci200syn.o
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obj-$(CONFIG_PC300TOO) += pc300too.o
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obj-$(CONFIG_PC300TOO) += pc300too.o
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obj-$(CONFIG_IXP4XX_HSS) += ixp4xx_hss.o
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obj-$(CONFIG_IXP4XX_HSS) += ixp4xx_hss.o
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obj-$(CONFIG_FSL_QMC_HDLC) += fsl_qmc_hdlc.o
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obj-$(CONFIG_FSL_UCC_HDLC) += fsl_ucc_hdlc.o
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obj-$(CONFIG_FSL_UCC_HDLC) += fsl_ucc_hdlc.o
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obj-$(CONFIG_SLIC_DS26522) += slic_ds26522.o
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obj-$(CONFIG_SLIC_DS26522) += slic_ds26522.o
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419
drivers/net/wan/fsl_qmc_hdlc.c
Normal file
419
drivers/net/wan/fsl_qmc_hdlc.c
Normal file
@ -0,0 +1,419 @@
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// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Freescale QMC HDLC Device Driver
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*
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* Copyright 2023 CS GROUP France
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*
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* Author: Herve Codina <herve.codina@bootlin.com>
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*/
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#include <linux/array_size.h>
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#include <linux/bug.h>
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#include <linux/cleanup.h>
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#include <linux/dma-mapping.h>
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#include <linux/device.h>
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#include <linux/err.h>
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#include <linux/hdlc.h>
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#include <linux/mod_devicetable.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <linux/spinlock.h>
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#include <linux/types.h>
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#include <soc/fsl/qe/qmc.h>
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struct qmc_hdlc_desc {
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struct net_device *netdev;
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struct sk_buff *skb; /* NULL if the descriptor is not in use */
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dma_addr_t dma_addr;
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size_t dma_size;
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};
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struct qmc_hdlc {
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struct device *dev;
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struct qmc_chan *qmc_chan;
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struct net_device *netdev;
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bool is_crc32;
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spinlock_t tx_lock; /* Protect tx descriptors */
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struct qmc_hdlc_desc tx_descs[8];
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unsigned int tx_out;
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struct qmc_hdlc_desc rx_descs[4];
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};
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static struct qmc_hdlc *netdev_to_qmc_hdlc(struct net_device *netdev)
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{
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return dev_to_hdlc(netdev)->priv;
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}
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static int qmc_hdlc_recv_queue(struct qmc_hdlc *qmc_hdlc, struct qmc_hdlc_desc *desc, size_t size);
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#define QMC_HDLC_RX_ERROR_FLAGS \
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(QMC_RX_FLAG_HDLC_OVF | QMC_RX_FLAG_HDLC_UNA | \
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QMC_RX_FLAG_HDLC_CRC | QMC_RX_FLAG_HDLC_ABORT)
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static void qmc_hcld_recv_complete(void *context, size_t length, unsigned int flags)
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{
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struct qmc_hdlc_desc *desc = context;
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struct net_device *netdev;
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struct qmc_hdlc *qmc_hdlc;
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int ret;
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netdev = desc->netdev;
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qmc_hdlc = netdev_to_qmc_hdlc(netdev);
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dma_unmap_single(qmc_hdlc->dev, desc->dma_addr, desc->dma_size, DMA_FROM_DEVICE);
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if (flags & QMC_HDLC_RX_ERROR_FLAGS) {
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netdev->stats.rx_errors++;
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if (flags & QMC_RX_FLAG_HDLC_OVF) /* Data overflow */
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netdev->stats.rx_over_errors++;
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if (flags & QMC_RX_FLAG_HDLC_UNA) /* bits received not multiple of 8 */
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netdev->stats.rx_frame_errors++;
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if (flags & QMC_RX_FLAG_HDLC_ABORT) /* Received an abort sequence */
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netdev->stats.rx_frame_errors++;
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if (flags & QMC_RX_FLAG_HDLC_CRC) /* CRC error */
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netdev->stats.rx_crc_errors++;
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kfree_skb(desc->skb);
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} else {
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netdev->stats.rx_packets++;
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netdev->stats.rx_bytes += length;
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skb_put(desc->skb, length);
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desc->skb->protocol = hdlc_type_trans(desc->skb, netdev);
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netif_rx(desc->skb);
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}
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/* Re-queue a transfer using the same descriptor */
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ret = qmc_hdlc_recv_queue(qmc_hdlc, desc, desc->dma_size);
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if (ret) {
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dev_err(qmc_hdlc->dev, "queue recv desc failed (%d)\n", ret);
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netdev->stats.rx_errors++;
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}
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}
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static int qmc_hdlc_recv_queue(struct qmc_hdlc *qmc_hdlc, struct qmc_hdlc_desc *desc, size_t size)
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{
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int ret;
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desc->skb = dev_alloc_skb(size);
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if (!desc->skb)
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return -ENOMEM;
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desc->dma_size = size;
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desc->dma_addr = dma_map_single(qmc_hdlc->dev, desc->skb->data,
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desc->dma_size, DMA_FROM_DEVICE);
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ret = dma_mapping_error(qmc_hdlc->dev, desc->dma_addr);
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if (ret)
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goto free_skb;
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ret = qmc_chan_read_submit(qmc_hdlc->qmc_chan, desc->dma_addr, desc->dma_size,
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qmc_hcld_recv_complete, desc);
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if (ret)
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goto dma_unmap;
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return 0;
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dma_unmap:
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dma_unmap_single(qmc_hdlc->dev, desc->dma_addr, desc->dma_size, DMA_FROM_DEVICE);
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free_skb:
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kfree_skb(desc->skb);
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desc->skb = NULL;
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return ret;
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}
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static void qmc_hdlc_xmit_complete(void *context)
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{
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struct qmc_hdlc_desc *desc = context;
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struct net_device *netdev;
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struct qmc_hdlc *qmc_hdlc;
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struct sk_buff *skb;
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netdev = desc->netdev;
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qmc_hdlc = netdev_to_qmc_hdlc(netdev);
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scoped_guard(spinlock_irqsave, &qmc_hdlc->tx_lock) {
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dma_unmap_single(qmc_hdlc->dev, desc->dma_addr, desc->dma_size, DMA_TO_DEVICE);
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skb = desc->skb;
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desc->skb = NULL; /* Release the descriptor */
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if (netif_queue_stopped(netdev))
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netif_wake_queue(netdev);
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}
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netdev->stats.tx_packets++;
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netdev->stats.tx_bytes += skb->len;
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dev_consume_skb_any(skb);
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}
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static int qmc_hdlc_xmit_queue(struct qmc_hdlc *qmc_hdlc, struct qmc_hdlc_desc *desc)
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{
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int ret;
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desc->dma_addr = dma_map_single(qmc_hdlc->dev, desc->skb->data,
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desc->dma_size, DMA_TO_DEVICE);
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ret = dma_mapping_error(qmc_hdlc->dev, desc->dma_addr);
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if (ret) {
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dev_err(qmc_hdlc->dev, "failed to map skb\n");
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return ret;
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}
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ret = qmc_chan_write_submit(qmc_hdlc->qmc_chan, desc->dma_addr, desc->dma_size,
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qmc_hdlc_xmit_complete, desc);
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if (ret) {
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dma_unmap_single(qmc_hdlc->dev, desc->dma_addr, desc->dma_size, DMA_TO_DEVICE);
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dev_err(qmc_hdlc->dev, "qmc chan write returns %d\n", ret);
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return ret;
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}
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return 0;
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}
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static netdev_tx_t qmc_hdlc_xmit(struct sk_buff *skb, struct net_device *netdev)
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{
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struct qmc_hdlc *qmc_hdlc = netdev_to_qmc_hdlc(netdev);
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struct qmc_hdlc_desc *desc;
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int err;
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guard(spinlock_irqsave)(&qmc_hdlc->tx_lock);
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desc = &qmc_hdlc->tx_descs[qmc_hdlc->tx_out];
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if (WARN_ONCE(desc->skb, "No tx descriptors available\n")) {
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/* Should never happen.
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* Previous xmit should have already stopped the queue.
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*/
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netif_stop_queue(netdev);
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return NETDEV_TX_BUSY;
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}
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desc->netdev = netdev;
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desc->dma_size = skb->len;
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desc->skb = skb;
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err = qmc_hdlc_xmit_queue(qmc_hdlc, desc);
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if (err) {
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desc->skb = NULL; /* Release the descriptor */
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if (err == -EBUSY) {
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netif_stop_queue(netdev);
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return NETDEV_TX_BUSY;
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}
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dev_kfree_skb(skb);
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netdev->stats.tx_dropped++;
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return NETDEV_TX_OK;
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}
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qmc_hdlc->tx_out = (qmc_hdlc->tx_out + 1) % ARRAY_SIZE(qmc_hdlc->tx_descs);
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if (qmc_hdlc->tx_descs[qmc_hdlc->tx_out].skb)
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netif_stop_queue(netdev);
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return NETDEV_TX_OK;
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}
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static int qmc_hdlc_open(struct net_device *netdev)
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{
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struct qmc_hdlc *qmc_hdlc = netdev_to_qmc_hdlc(netdev);
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struct qmc_chan_param chan_param;
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struct qmc_hdlc_desc *desc;
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int ret;
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int i;
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ret = hdlc_open(netdev);
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if (ret)
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return ret;
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chan_param.mode = QMC_HDLC;
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/* HDLC_MAX_MRU + 4 for the CRC
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* HDLC_MAX_MRU + 4 + 8 for the CRC and some extraspace needed by the QMC
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*/
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chan_param.hdlc.max_rx_buf_size = HDLC_MAX_MRU + 4 + 8;
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chan_param.hdlc.max_rx_frame_size = HDLC_MAX_MRU + 4;
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chan_param.hdlc.is_crc32 = qmc_hdlc->is_crc32;
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ret = qmc_chan_set_param(qmc_hdlc->qmc_chan, &chan_param);
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if (ret) {
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dev_err(qmc_hdlc->dev, "failed to set param (%d)\n", ret);
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goto hdlc_close;
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}
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/* Queue as many recv descriptors as possible */
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for (i = 0; i < ARRAY_SIZE(qmc_hdlc->rx_descs); i++) {
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desc = &qmc_hdlc->rx_descs[i];
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desc->netdev = netdev;
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ret = qmc_hdlc_recv_queue(qmc_hdlc, desc, chan_param.hdlc.max_rx_buf_size);
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if (ret == -EBUSY && i != 0)
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break; /* We use all the QMC chan capability */
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if (ret)
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goto free_desc;
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}
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ret = qmc_chan_start(qmc_hdlc->qmc_chan, QMC_CHAN_ALL);
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if (ret) {
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dev_err(qmc_hdlc->dev, "qmc chan start failed (%d)\n", ret);
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goto free_desc;
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}
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netif_start_queue(netdev);
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return 0;
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free_desc:
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qmc_chan_reset(qmc_hdlc->qmc_chan, QMC_CHAN_ALL);
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while (i--) {
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desc = &qmc_hdlc->rx_descs[i];
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dma_unmap_single(qmc_hdlc->dev, desc->dma_addr, desc->dma_size,
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DMA_FROM_DEVICE);
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kfree_skb(desc->skb);
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desc->skb = NULL;
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}
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hdlc_close:
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hdlc_close(netdev);
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return ret;
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}
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static int qmc_hdlc_close(struct net_device *netdev)
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{
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struct qmc_hdlc *qmc_hdlc = netdev_to_qmc_hdlc(netdev);
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struct qmc_hdlc_desc *desc;
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int i;
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qmc_chan_stop(qmc_hdlc->qmc_chan, QMC_CHAN_ALL);
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qmc_chan_reset(qmc_hdlc->qmc_chan, QMC_CHAN_ALL);
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netif_stop_queue(netdev);
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for (i = 0; i < ARRAY_SIZE(qmc_hdlc->tx_descs); i++) {
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desc = &qmc_hdlc->tx_descs[i];
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if (!desc->skb)
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continue;
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dma_unmap_single(qmc_hdlc->dev, desc->dma_addr, desc->dma_size,
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DMA_TO_DEVICE);
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kfree_skb(desc->skb);
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desc->skb = NULL;
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}
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for (i = 0; i < ARRAY_SIZE(qmc_hdlc->rx_descs); i++) {
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desc = &qmc_hdlc->rx_descs[i];
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if (!desc->skb)
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continue;
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dma_unmap_single(qmc_hdlc->dev, desc->dma_addr, desc->dma_size,
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DMA_FROM_DEVICE);
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kfree_skb(desc->skb);
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desc->skb = NULL;
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}
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hdlc_close(netdev);
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return 0;
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}
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static int qmc_hdlc_attach(struct net_device *netdev, unsigned short encoding,
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unsigned short parity)
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{
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struct qmc_hdlc *qmc_hdlc = netdev_to_qmc_hdlc(netdev);
|
||||||
|
|
||||||
|
if (encoding != ENCODING_NRZ)
|
||||||
|
return -EINVAL;
|
||||||
|
|
||||||
|
switch (parity) {
|
||||||
|
case PARITY_CRC16_PR1_CCITT:
|
||||||
|
qmc_hdlc->is_crc32 = false;
|
||||||
|
break;
|
||||||
|
case PARITY_CRC32_PR1_CCITT:
|
||||||
|
qmc_hdlc->is_crc32 = true;
|
||||||
|
break;
|
||||||
|
default:
|
||||||
|
dev_err(qmc_hdlc->dev, "unsupported parity %u\n", parity);
|
||||||
|
return -EINVAL;
|
||||||
|
}
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
static const struct net_device_ops qmc_hdlc_netdev_ops = {
|
||||||
|
.ndo_open = qmc_hdlc_open,
|
||||||
|
.ndo_stop = qmc_hdlc_close,
|
||||||
|
.ndo_start_xmit = hdlc_start_xmit,
|
||||||
|
.ndo_siocwandev = hdlc_ioctl,
|
||||||
|
};
|
||||||
|
|
||||||
|
static int qmc_hdlc_probe(struct platform_device *pdev)
|
||||||
|
{
|
||||||
|
struct device *dev = &pdev->dev;
|
||||||
|
struct qmc_hdlc *qmc_hdlc;
|
||||||
|
struct qmc_chan_info info;
|
||||||
|
hdlc_device *hdlc;
|
||||||
|
int ret;
|
||||||
|
|
||||||
|
qmc_hdlc = devm_kzalloc(dev, sizeof(*qmc_hdlc), GFP_KERNEL);
|
||||||
|
if (!qmc_hdlc)
|
||||||
|
return -ENOMEM;
|
||||||
|
|
||||||
|
qmc_hdlc->dev = dev;
|
||||||
|
spin_lock_init(&qmc_hdlc->tx_lock);
|
||||||
|
|
||||||
|
qmc_hdlc->qmc_chan = devm_qmc_chan_get_bychild(dev, dev->of_node);
|
||||||
|
if (IS_ERR(qmc_hdlc->qmc_chan))
|
||||||
|
return dev_err_probe(dev, PTR_ERR(qmc_hdlc->qmc_chan),
|
||||||
|
"get QMC channel failed\n");
|
||||||
|
|
||||||
|
ret = qmc_chan_get_info(qmc_hdlc->qmc_chan, &info);
|
||||||
|
if (ret)
|
||||||
|
return dev_err_probe(dev, ret, "get QMC channel info failed\n");
|
||||||
|
|
||||||
|
if (info.mode != QMC_HDLC)
|
||||||
|
return dev_err_probe(dev, -EINVAL, "QMC chan mode %d is not QMC_HDLC\n",
|
||||||
|
info.mode);
|
||||||
|
|
||||||
|
qmc_hdlc->netdev = alloc_hdlcdev(qmc_hdlc);
|
||||||
|
if (!qmc_hdlc->netdev)
|
||||||
|
return -ENOMEM;
|
||||||
|
|
||||||
|
hdlc = dev_to_hdlc(qmc_hdlc->netdev);
|
||||||
|
hdlc->attach = qmc_hdlc_attach;
|
||||||
|
hdlc->xmit = qmc_hdlc_xmit;
|
||||||
|
SET_NETDEV_DEV(qmc_hdlc->netdev, dev);
|
||||||
|
qmc_hdlc->netdev->tx_queue_len = ARRAY_SIZE(qmc_hdlc->tx_descs);
|
||||||
|
qmc_hdlc->netdev->netdev_ops = &qmc_hdlc_netdev_ops;
|
||||||
|
ret = register_hdlc_device(qmc_hdlc->netdev);
|
||||||
|
if (ret) {
|
||||||
|
dev_err_probe(dev, ret, "failed to register hdlc device\n");
|
||||||
|
goto free_netdev;
|
||||||
|
}
|
||||||
|
|
||||||
|
platform_set_drvdata(pdev, qmc_hdlc);
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
|
||||||
|
free_netdev:
|
||||||
|
free_netdev(qmc_hdlc->netdev);
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
|
|
||||||
|
static int qmc_hdlc_remove(struct platform_device *pdev)
|
||||||
|
{
|
||||||
|
struct qmc_hdlc *qmc_hdlc = platform_get_drvdata(pdev);
|
||||||
|
|
||||||
|
unregister_hdlc_device(qmc_hdlc->netdev);
|
||||||
|
free_netdev(qmc_hdlc->netdev);
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
static const struct of_device_id qmc_hdlc_id_table[] = {
|
||||||
|
{ .compatible = "fsl,qmc-hdlc" },
|
||||||
|
{} /* sentinel */
|
||||||
|
};
|
||||||
|
MODULE_DEVICE_TABLE(of, qmc_hdlc_driver);
|
||||||
|
|
||||||
|
static struct platform_driver qmc_hdlc_driver = {
|
||||||
|
.driver = {
|
||||||
|
.name = "fsl-qmc-hdlc",
|
||||||
|
.of_match_table = qmc_hdlc_id_table,
|
||||||
|
},
|
||||||
|
.probe = qmc_hdlc_probe,
|
||||||
|
.remove = qmc_hdlc_remove,
|
||||||
|
};
|
||||||
|
module_platform_driver(qmc_hdlc_driver);
|
||||||
|
|
||||||
|
MODULE_AUTHOR("Herve Codina <herve.codina@bootlin.com>");
|
||||||
|
MODULE_DESCRIPTION("QMC HDLC driver");
|
||||||
|
MODULE_LICENSE("GPL");
|
||||||
Loading…
Reference in New Issue
Block a user