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gpu: host1x: Add Tegra SE to SID table

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Add Tegra Security Engine details to the SID table in host1x driver.
These entries are required to be in place to configure the stream ID
for SE. Register writes to stream ID registers fail otherwise.

Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
Acked-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This commit is contained in:
Akhil R 2024-04-03 15:30:36 +05:30 committed by Herbert Xu
parent 17048b225b
commit cc370ff85b
1 changed files with 24 additions and 0 deletions
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24
drivers/gpu/host1x/dev.c
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@ -215,6 +215,30 @@ static const struct host1x_info host1x07_info = {
* and firmware stream ID in the MMIO path table.
*/
static const struct host1x_sid_entry tegra234_sid_table[] = {
{
/* SE2 MMIO */
.base = 0x1658,
.offset = 0x90,
.limit = 0x90
},
{
/* SE4 MMIO */
.base = 0x1660,
.offset = 0x90,
.limit = 0x90
},
{
/* SE2 channel */
.base = 0x1738,
.offset = 0x90,
.limit = 0x90
},
{
/* SE4 channel */
.base = 0x1740,
.offset = 0x90,
.limit = 0x90
},
{
/* VIC channel */
.base = 0x17b8,