MIPS: Loongson64: Test register availability before use
Some global register address variable may be missing on specific CPU type, test them before use them. Cc: stable@vger.kernel.org Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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@ -466,12 +466,25 @@ static void loongson3_smp_finish(void)
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static void __init loongson3_smp_setup(void)
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static void __init loongson3_smp_setup(void)
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{
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{
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int i = 0, num = 0; /* i: physical id, num: logical id */
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int i = 0, num = 0; /* i: physical id, num: logical id */
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int max_cpus = 0;
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init_cpu_possible(cpu_none_mask);
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init_cpu_possible(cpu_none_mask);
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for (i = 0; i < ARRAY_SIZE(smp_group); i++) {
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if (!smp_group[i])
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break;
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max_cpus += loongson_sysconf.cores_per_node;
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}
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if (max_cpus < loongson_sysconf.nr_cpus) {
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pr_err("SMP Groups are less than the number of CPUs\n");
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loongson_sysconf.nr_cpus = max_cpus ? max_cpus : 1;
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}
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/* For unified kernel, NR_CPUS is the maximum possible value,
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/* For unified kernel, NR_CPUS is the maximum possible value,
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* loongson_sysconf.nr_cpus is the really present value
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* loongson_sysconf.nr_cpus is the really present value
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*/
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*/
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i = 0;
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while (i < loongson_sysconf.nr_cpus) {
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while (i < loongson_sysconf.nr_cpus) {
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if (loongson_sysconf.reserved_cpus_mask & (1<<i)) {
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if (loongson_sysconf.reserved_cpus_mask & (1<<i)) {
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/* Reserved physical CPU cores */
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/* Reserved physical CPU cores */
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@ -492,14 +505,14 @@ static void __init loongson3_smp_setup(void)
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__cpu_logical_map[num] = -1;
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__cpu_logical_map[num] = -1;
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num++;
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num++;
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}
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}
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csr_ipi_probe();
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csr_ipi_probe();
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ipi_set0_regs_init();
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ipi_set0_regs_init();
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ipi_clear0_regs_init();
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ipi_clear0_regs_init();
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ipi_status0_regs_init();
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ipi_status0_regs_init();
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ipi_en0_regs_init();
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ipi_en0_regs_init();
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ipi_mailbox_buf_init();
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ipi_mailbox_buf_init();
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ipi_write_enable(0);
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if (smp_group[0])
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ipi_write_enable(0);
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cpu_set_core(&cpu_data[0],
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cpu_set_core(&cpu_data[0],
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cpu_logical_map(0) % loongson_sysconf.cores_per_package);
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cpu_logical_map(0) % loongson_sysconf.cores_per_package);
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@ -818,6 +831,9 @@ static int loongson3_disable_clock(unsigned int cpu)
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uint64_t core_id = cpu_core(&cpu_data[cpu]);
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uint64_t core_id = cpu_core(&cpu_data[cpu]);
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uint64_t package_id = cpu_data[cpu].package;
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uint64_t package_id = cpu_data[cpu].package;
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if (!loongson_chipcfg[package_id] || !loongson_freqctrl[package_id])
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return 0;
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if ((read_c0_prid() & PRID_REV_MASK) == PRID_REV_LOONGSON3A_R1) {
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if ((read_c0_prid() & PRID_REV_MASK) == PRID_REV_LOONGSON3A_R1) {
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LOONGSON_CHIPCFG(package_id) &= ~(1 << (12 + core_id));
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LOONGSON_CHIPCFG(package_id) &= ~(1 << (12 + core_id));
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} else {
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} else {
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@ -832,6 +848,9 @@ static int loongson3_enable_clock(unsigned int cpu)
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uint64_t core_id = cpu_core(&cpu_data[cpu]);
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uint64_t core_id = cpu_core(&cpu_data[cpu]);
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uint64_t package_id = cpu_data[cpu].package;
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uint64_t package_id = cpu_data[cpu].package;
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if (!loongson_chipcfg[package_id] || !loongson_freqctrl[package_id])
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return 0;
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if ((read_c0_prid() & PRID_REV_MASK) == PRID_REV_LOONGSON3A_R1) {
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if ((read_c0_prid() & PRID_REV_MASK) == PRID_REV_LOONGSON3A_R1) {
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LOONGSON_CHIPCFG(package_id) |= 1 << (12 + core_id);
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LOONGSON_CHIPCFG(package_id) |= 1 << (12 + core_id);
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} else {
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} else {
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