x86/CPU/AMD: Move the DIV0 bug detection to the Zen1 init function
No functional changes. Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Reviewed-by: Nikolay Borisov <nik.borisov@suse.com> Link: http://lore.kernel.org/r/20231120104152.13740-9-bp@alien8.de
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@ -70,10 +70,6 @@ static const int amd_erratum_383[] =
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static const int amd_erratum_1054[] =
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AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x17, 0, 0, 0x2f, 0xf));
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static const int amd_div0[] =
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AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x17, 0x00, 0x0, 0x2f, 0xf),
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AMD_MODEL_RANGE(0x17, 0x50, 0x0, 0x5f, 0xf));
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static const int amd_erratum_1485[] =
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AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x19, 0x10, 0x0, 0x1f, 0xf),
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AMD_MODEL_RANGE(0x19, 0x60, 0x0, 0xaf, 0xf));
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@ -1030,6 +1026,9 @@ static void init_amd_zen(struct cpuinfo_x86 *c)
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if (!cpu_has(c, X86_FEATURE_CPB))
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set_cpu_cap(c, X86_FEATURE_CPB);
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}
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pr_notice_once("AMD Zen1 DIV0 bug detected. Disable SMT for full protection.\n");
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setup_force_cpu_bug(X86_BUG_DIV0);
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}
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static bool cpu_has_zenbleed_microcode(void)
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@ -1067,7 +1066,6 @@ static void zen2_zenbleed_check(struct cpuinfo_x86 *c)
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} else {
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msr_clear_bit(MSR_AMD64_DE_CFG, MSR_AMD64_DE_CFG_ZEN2_FP_BACKUP_FIX_BIT);
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}
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}
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static void init_amd_zen2(struct cpuinfo_x86 *c)
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@ -1219,11 +1217,6 @@ static void init_amd(struct cpuinfo_x86 *c)
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cpu_has(c, X86_FEATURE_AUTOIBRS))
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WARN_ON_ONCE(msr_set_bit(MSR_EFER, _EFER_AUTOIBRS));
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if (cpu_has_amd_erratum(c, amd_div0)) {
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pr_notice_once("AMD Zen1 DIV0 bug detected. Disable SMT for full protection.\n");
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setup_force_cpu_bug(X86_BUG_DIV0);
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}
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if (!cpu_has(c, X86_FEATURE_HYPERVISOR) &&
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cpu_has_amd_erratum(c, amd_erratum_1485))
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msr_set_bit(MSR_ZEN4_BP_CFG, MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT);
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