x86/xen: mark boot CPU of PV guest in MSR_IA32_APICBASE
Recent topology checks of the x86 boot code uncovered the need for
PV guests to have the boot cpu marked in the APICBASE MSR.
Fixes: 9d22c96316
("x86/topology: Handle bogus ACPI tables correctly")
Reported-by: Niels Dettenbach <nd@syndicat.com>
Signed-off-by: Juergen Gross <jgross@suse.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Juergen Gross <jgross@suse.com>
This commit is contained in:
parent
9af48210ea
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bf56c41016
@ -1032,6 +1032,10 @@ static u64 xen_do_read_msr(unsigned int msr, int *err)
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switch (msr) {
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switch (msr) {
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case MSR_IA32_APICBASE:
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case MSR_IA32_APICBASE:
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val &= ~X2APIC_ENABLE;
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val &= ~X2APIC_ENABLE;
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if (smp_processor_id() == 0)
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val |= MSR_IA32_APICBASE_BSP;
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else
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val &= ~MSR_IA32_APICBASE_BSP;
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break;
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break;
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}
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}
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return val;
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return val;
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