dt-bindings: clock: qcom,gcc: sort out power-domains support
On some of Qualcomm platforms the Global Clock Controller (GCC) doesn't provide power domains. Move requirement for the '#power-domain-cells' out of the common qcom,gcc.yaml into individual schema files. For the platforms that do not provide power-domains, explicitly forbid having the '#power-domain-cells' property. Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240529-qcom-gdscs-v2-2-69c63d0ae1e7@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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@ -69,6 +69,8 @@ properties:
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const: 1
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deprecated: true
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'#power-domain-cells': false
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required:
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- compatible
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@ -81,7 +83,6 @@ examples:
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reg = <0x00900000 0x4000>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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#power-domain-cells = <1>;
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thermal-sensor {
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compatible = "qcom,msm8960-tsens";
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@ -51,6 +51,7 @@ properties:
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required:
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- compatible
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- '#power-domain-cells'
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unevaluatedProperties: false
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@ -34,6 +34,8 @@ properties:
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- const: xo
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- const: sleep_clk
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'#power-domain-cells': false
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required:
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- compatible
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@ -45,7 +47,6 @@ examples:
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compatible = "qcom,gcc-ipq4019";
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reg = <0x1800000 0x60000>;
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#clock-cells = <1>;
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#power-domain-cells = <1>;
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#reset-cells = <1>;
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clocks = <&xo>, <&sleep_clk>;
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clock-names = "xo", "sleep_clk";
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@ -36,6 +36,8 @@ properties:
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- const: xo
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- const: sleep_clk
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'#power-domain-cells': false
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required:
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- compatible
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- clocks
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@ -51,7 +53,6 @@ examples:
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clocks = <&xo>, <&sleep_clk>;
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clock-names = "xo", "sleep_clk";
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#clock-cells = <1>;
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#power-domain-cells = <1>;
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#reset-cells = <1>;
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};
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...
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@ -46,6 +46,8 @@ properties:
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allOf:
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- $ref: /schemas/thermal/qcom-tsens.yaml#
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'#power-domain-cells': false
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required:
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- compatible
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- clocks
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@ -65,7 +67,6 @@ examples:
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clock-names = "pxo", "cxo", "pll4";
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#clock-cells = <1>;
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#reset-cells = <1>;
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#power-domain-cells = <1>;
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tsens: thermal-sensor {
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compatible = "qcom,ipq8064-tsens";
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@ -39,6 +39,7 @@ properties:
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required:
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- compatible
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- '#power-domain-cells'
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unevaluatedProperties: false
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@ -27,6 +27,7 @@ properties:
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required:
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- compatible
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- '#power-domain-cells'
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unevaluatedProperties: false
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@ -34,6 +34,8 @@ properties:
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- const: pxo
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- const: cxo
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'#power-domain-cells': false
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required:
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- compatible
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@ -47,7 +49,6 @@ examples:
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reg = <0x900000 0x4000>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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#power-domain-cells = <1>;
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clocks = <&pxo_board>, <&cxo_board>;
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clock-names = "pxo", "cxo";
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};
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@ -42,6 +42,7 @@ required:
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- compatible
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- clocks
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- clock-names
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- '#power-domain-cells'
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allOf:
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- $ref: qcom,gcc.yaml#
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@ -48,6 +48,7 @@ properties:
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required:
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- compatible
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- '#power-domain-cells'
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allOf:
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- $ref: qcom,gcc.yaml#
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@ -42,6 +42,7 @@ required:
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- compatible
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- clocks
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- clock-names
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- '#power-domain-cells'
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allOf:
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- $ref: qcom,gcc.yaml#
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@ -41,6 +41,7 @@ properties:
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required:
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- compatible
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- '#power-domain-cells'
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unevaluatedProperties: false
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@ -49,6 +49,7 @@ required:
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- clocks
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- clock-names
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- vdd_gfx-supply
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- '#power-domain-cells'
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allOf:
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- $ref: qcom,gcc.yaml#
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@ -35,6 +35,7 @@ required:
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- compatible
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- clocks
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- clock-names
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- '#power-domain-cells'
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allOf:
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- $ref: qcom,gcc.yaml#
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@ -50,6 +50,7 @@ properties:
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required:
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- compatible
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- '#power-domain-cells'
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allOf:
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- $ref: qcom,gcc.yaml#
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@ -38,6 +38,7 @@ required:
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- compatible
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- clocks
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- clock-names
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- '#power-domain-cells'
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allOf:
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- $ref: qcom,gcc.yaml#
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@ -33,6 +33,7 @@ required:
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- compatible
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- clocks
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- clock-names
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- '#power-domain-cells'
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allOf:
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- $ref: qcom,gcc.yaml#
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@ -40,6 +40,7 @@ properties:
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required:
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- compatible
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- '#power-domain-cells'
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allOf:
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- $ref: qcom,gcc.yaml#
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@ -40,6 +40,7 @@ required:
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- compatible
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- clocks
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- clock-names
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- '#power-domain-cells'
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allOf:
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- $ref: qcom,gcc.yaml#
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@ -51,6 +51,7 @@ required:
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- compatible
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- clocks
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- clock-names
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- '#power-domain-cells'
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allOf:
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- $ref: qcom,gcc.yaml#
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@ -40,6 +40,7 @@ required:
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- clocks
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- clock-names
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- power-domains
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- '#power-domain-cells'
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allOf:
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- $ref: qcom,gcc.yaml#
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@ -65,6 +65,7 @@ properties:
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required:
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- compatible
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- clocks
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- '#power-domain-cells'
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allOf:
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- $ref: qcom,gcc.yaml#
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@ -40,6 +40,7 @@ properties:
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required:
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- compatible
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- '#power-domain-cells'
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unevaluatedProperties: false
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@ -35,6 +35,7 @@ properties:
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required:
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- compatible
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- '#power-domain-cells'
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allOf:
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- $ref: qcom,gcc.yaml#
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@ -34,6 +34,7 @@ required:
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- compatible
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- clocks
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- clock-names
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- '#power-domain-cells'
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allOf:
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- $ref: qcom,gcc.yaml#
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@ -39,6 +39,7 @@ required:
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- compatible
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- clocks
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- clock-names
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- '#power-domain-cells'
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allOf:
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- $ref: qcom,gcc.yaml#
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@ -33,6 +33,7 @@ required:
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- compatible
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- clocks
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- clock-names
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- '#power-domain-cells'
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allOf:
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- $ref: qcom,gcc.yaml#
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@ -33,6 +33,7 @@ required:
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- compatible
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- clocks
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- clock-names
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- '#power-domain-cells'
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allOf:
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- $ref: qcom,gcc.yaml#
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@ -35,6 +35,7 @@ required:
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- compatible
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- clocks
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- clock-names
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- '#power-domain-cells'
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allOf:
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- $ref: qcom,gcc.yaml#
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@ -34,6 +34,7 @@ required:
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- compatible
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- clocks
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- clock-names
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- '#power-domain-cells'
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allOf:
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- $ref: qcom,gcc.yaml#
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@ -36,6 +36,7 @@ required:
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- compatible
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- clocks
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- clock-names
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- '#power-domain-cells'
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allOf:
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- $ref: qcom,gcc.yaml#
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@ -55,6 +55,7 @@ required:
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- compatible
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- clocks
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- clock-names
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- '#power-domain-cells'
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allOf:
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- $ref: qcom,gcc.yaml#
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@ -49,6 +49,7 @@ required:
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- compatible
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- clocks
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- clock-names
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- '#power-domain-cells'
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allOf:
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- $ref: qcom,gcc.yaml#
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@ -35,7 +35,6 @@ required:
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- reg
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- '#clock-cells'
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- '#reset-cells'
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- '#power-domain-cells'
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additionalProperties: true
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@ -33,6 +33,8 @@ properties:
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- description: UNIPHY RX clock source
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- description: UNIPHY TX clk source
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'#power-domain-cells': false
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required:
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- compatible
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- clocks
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@ -58,6 +60,5 @@ examples:
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<&uniphy_tx_clk>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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#power-domain-cells = <1>;
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};
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...
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@ -30,6 +30,8 @@ properties:
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- description: PCIE 2lane x1 PHY pipe clock source (For second lane)
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- description: USB PCIE wrapper pipe clock source
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'#power-domain-cells': false
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required:
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- compatible
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- clocks
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@ -47,7 +49,6 @@ examples:
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<&pcie_2lane_phy_pipe_clk_x1>,
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<&usb_pcie_wrapper_pipe_clk>;
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#clock-cells = <1>;
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#power-domain-cells = <1>;
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#reset-cells = <1>;
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};
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...
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@ -33,6 +33,8 @@ properties:
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- description: PCIE30 PHY3 pipe clock source
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- description: USB3 PHY pipe clock source
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'#power-domain-cells': false
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required:
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- compatible
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- clocks
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@ -57,6 +59,5 @@ examples:
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<&usb3phy_0_cc_pipe_clk>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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#power-domain-cells = <1>;
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};
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...
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@ -31,6 +31,7 @@ properties:
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required:
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- compatible
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- clocks
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- '#power-domain-cells'
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allOf:
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- $ref: qcom,gcc.yaml#
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@ -46,6 +46,7 @@ properties:
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required:
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- compatible
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- clocks
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- '#power-domain-cells'
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allOf:
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- $ref: qcom,gcc.yaml#
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@ -41,6 +41,7 @@ properties:
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required:
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- compatible
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- clocks
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- '#power-domain-cells'
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allOf:
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- $ref: qcom,gcc.yaml#
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@ -32,6 +32,7 @@ properties:
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required:
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- compatible
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- clocks
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- '#power-domain-cells'
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allOf:
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- $ref: qcom,gcc.yaml#
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@ -31,6 +31,7 @@ properties:
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required:
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- compatible
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- clocks
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- '#power-domain-cells'
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unevaluatedProperties: false
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@ -30,6 +30,7 @@ properties:
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required:
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- compatible
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- clocks
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- '#power-domain-cells'
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allOf:
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- $ref: qcom,gcc.yaml#
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@ -34,6 +34,7 @@ properties:
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required:
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- compatible
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- clocks
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- '#power-domain-cells'
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allOf:
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- $ref: qcom,gcc.yaml#
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@ -35,6 +35,7 @@ properties:
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required:
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- compatible
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- clocks
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- '#power-domain-cells'
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allOf:
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- $ref: qcom,gcc.yaml#
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@ -41,6 +41,7 @@ required:
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- compatible
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- clocks
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- power-domains
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- '#power-domain-cells'
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allOf:
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- $ref: qcom,gcc.yaml#
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