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microblaze: Add xmb_manager_register function

Triple Modular Redundancy (TMR) Microblaze solution provides soft error
injection, detection, correction and recovery for Microblaze cores in the
system. The Xilinx/AMD Triple Modular Redundancy (TMR) solution in Vivado
provides all the necessary building blocks to implement a redundant
triplicated MicroBlaze subsystem. This processing subsystem is
fault-tolerant and continues to operate nominally after encountering an
error. Together with the capability to detect and recover from errors,
the implementation ensures the reliability of the entire subsystem.

When the break vector gets asserted because of error injection,
the break signal must be blocked before exiting from the break handler,
This commit adds support for xmb_manager_register api which updates the
TMR manager address and control register and error count and reset callback
function arguments, which will be used by the break handler to block the
break and call the error count callback function and reset callback
function.

Signed-off-by: Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com>
Link: https://lore.kernel.org/r/20220627064024.771037-2-appana.durga.rao@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
This commit is contained in:
Appana Durga Kedareswara rao 2022-06-27 12:10:22 +05:30 committed by Michal Simek
parent 568035b01c
commit a5e3aaa654
3 changed files with 75 additions and 0 deletions

View File

@ -204,6 +204,16 @@ config TASK_SIZE
hex "Size of user task space" if TASK_SIZE_BOOL
default "0x80000000"
config MB_MANAGER
bool "Support for Microblaze Manager"
depends on ADVANCED_OPTIONS
help
This option enables API for configuring the MicroBlaze manager
control register, which is consumed by the break handler to
block the break.
Say N here unless you know what you are doing.
endmenu
menu "Bus Options"

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@ -0,0 +1,21 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2022 Xilinx, Inc.
*/
#ifndef _XILINX_MB_MANAGER_H
#define _XILINX_MB_MANAGER_H
#include <linux/of_address.h>
/*
* When the break vector gets asserted because of error injection, the break
* signal must be blocked before exiting from the break handler, Below api
* updates the manager address and control register and error counter callback
* arguments, which will be used by the break handler to block the break and
* call the callback function.
*/
void xmb_manager_register(uintptr_t phys_baseaddr, u32 cr_val,
void (*callback)(void *data),
void *priv, void (*reset_callback)(void *data));
#endif /* _XILINX_MB_MANAGER_H */

View File

@ -957,6 +957,50 @@ ENTRY(_switch_to)
rtsd r15, 8
nop
#ifdef CONFIG_MB_MANAGER
.section .data
.global xmb_manager_dev
.global xmb_manager_baseaddr
.global xmb_manager_crval
.global xmb_manager_callback
.global xmb_manager_reset_callback
.align 4
xmb_manager_dev:
.long 0
xmb_manager_baseaddr:
.long 0
xmb_manager_crval:
.long 0
xmb_manager_callback:
.long 0
xmb_manager_reset_callback:
.long 0
/*
* When the break vector gets asserted because of error injection,
* the break signal must be blocked before exiting from the
* break handler, Below api updates the manager address and
* control register and error count callback arguments,
* which will be used by the break handler to block the
* break and call the callback function.
*/
.global xmb_manager_register
.section .text
.align 2
.ent xmb_manager_register
.type xmb_manager_register, @function
xmb_manager_register:
swi r5, r0, xmb_manager_baseaddr
swi r6, r0, xmb_manager_crval
swi r7, r0, xmb_manager_callback
swi r8, r0, xmb_manager_dev
swi r9, r0, xmb_manager_reset_callback
rtsd r15, 8;
nop;
.end xmb_manager_register
#endif
ENTRY(_reset)
VM_OFF
brai 0; /* Jump to reset vector */