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dt-bindings: PCI: socionext,uniphier-pcie-ep: Add top-level constraints

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Properties with variable number of items per each device are expected to
have widest constraints in top-level "properties:" block and further
customized (narrowed) in "if:then:".

Add missing top-level constraints for clock-names and reset-names.

Link: https://lore.kernel.org/linux-pci/20240818172843.121787-3-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
This commit is contained in:
Krzysztof Kozlowski 2024-08-18 19:28:43 +02:00 committed by Krzysztof Wilczyński
parent c62a0b8fe8
commit a5c1bf7e9a
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1 changed files with 6 additions and 2 deletions
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Documentation/devicetree/bindings/pci/socionext,uniphier-pcie-ep.yaml
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@ -38,13 +38,17 @@ properties:
minItems: 1
maxItems: 2
clock-names: true
clock-names:
minItems: 1
maxItems: 2
resets:
minItems: 1
maxItems: 2
reset-names: true
reset-names:
minItems: 1
maxItems: 2
num-ib-windows:
const: 16