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dt-bindings: clock: qcom: Add SM7150 VIDEOCC clocks

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Add device tree bindings for the video clock controller on Qualcomm
SM7150 platform.

Signed-off-by: Danila Tikhonov <danila@jiaxyga.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20240505201038.276047-8-danila@jiaxyga.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Danila Tikhonov 2024-05-05 23:10:37 +03:00 committed by Bjorn Andersson
parent 9f0532da42
commit a4be1860b9
2 changed files with 86 additions and 0 deletions
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58
Documentation/devicetree/bindings/clock/qcom,sm7150-videocc.yaml Normal file
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/qcom,sm7150-videocc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Video Clock & Reset Controller on SM7150
maintainers:
- Danila Tikhonov <danila@jiaxyga.com>
- David Wronek <david@mainlining.org>
- Jens Reidel <adrian@travitia.xyz>
description: |
Qualcomm video clock control module provides the clocks, resets and power
domains on SM7150.
See also:: include/dt-bindings/clock/qcom,videocc-sm7150.h
properties:
compatible:
const: qcom,sm7150-videocc
clocks:
items:
- description: Board XO source
- description: Board Always On XO source
power-domains:
maxItems: 1
description:
CX power domain.
required:
- compatible
- clocks
- power-domains
allOf:
- $ref: qcom,gcc.yaml#
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/clock/qcom,rpmh.h>
#include <dt-bindings/power/qcom,rpmhpd.h>
videocc: clock-controller@ab00000 {
compatible = "qcom,sm7150-videocc";
reg = <0x0ab00000 0x10000>;
clocks = <&rpmhcc RPMH_CXO_CLK>,
<&rpmhcc RPMH_CXO_CLK_A>;
power-domains = <&rpmhpd RPMHPD_CX>;
#clock-cells = <1>;
#reset-cells = <1>;
#power-domain-cells = <1>;
};
...

28
include/dt-bindings/clock/qcom,sm7150-videocc.h Normal file
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/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
/*
* Copyright (c) 2018, The Linux Foundation. All rights reserved.
* Copyright (c) 2024, Danila Tikhonov <danila@jiaxyga.com>
*/
#ifndef _DT_BINDINGS_CLK_QCOM_VIDEOCC_SM7150_H
#define _DT_BINDINGS_CLK_QCOM_VIDEOCC_SM7150_H
#define VIDEOCC_PLL0 0
#define VIDEOCC_IRIS_AHB_CLK 1
#define VIDEOCC_IRIS_CLK_SRC 2
#define VIDEOCC_MVS0_AXI_CLK 3
#define VIDEOCC_MVS0_CORE_CLK 4
#define VIDEOCC_MVS1_AXI_CLK 5
#define VIDEOCC_MVS1_CORE_CLK 6
#define VIDEOCC_MVSC_CORE_CLK 7
#define VIDEOCC_MVSC_CTL_AXI_CLK 8
#define VIDEOCC_VENUS_AHB_CLK 9
#define VIDEOCC_XO_CLK 10
#define VIDEOCC_XO_CLK_SRC 11
/* VIDEOCC GDSCRs */
#define VENUS_GDSC 0
#define VCODEC0_GDSC 1
#define VCODEC1_GDSC 2
#endif