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i3c: mipi-i3c-hci: Report NACK response from CCC command to core

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Currently probe of mipi-i3c-hci will fail if bus doesn't have any I3C
devices connected. This happens when CCC commands that are sent during
i3c_master_bus_init() are not ACKed by any device and controller responds
with an error status set.

The controller can detect NACK both during I3C address header
transmission (broadcast address 0x7e is not ACKed) and when target
device address or dynamic address assignment is NACKed. Former as error
status 0x4: Address Header Error and latter as 0x5: NACK.

Difference between those two NACK statuses were not described explicitly
until MIPI I3C HCI Specification v1.1. Earlier versions share the same
error status code though.

Report both of those as I3C_ERROR_M2 to I3C core code.

Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Link: https://lore.kernel.org/r/20231109133708.653950-2-jarkko.nikula@linux.intel.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
This commit is contained in:
Jarkko Nikula 2023-11-09 15:37:05 +02:00 committed by Alexandre Belloni
parent b85ea95d08
commit 9e0e9e85e7
1 changed files with 8 additions and 1 deletions
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9
drivers/i3c/master/mipi-i3c-hci/core.c
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@ -245,7 +245,14 @@ static int i3c_hci_send_ccc_cmd(struct i3c_master_controller *m,
if (ccc->rnw)
ccc->dests[i - prefixed].payload.len =
RESP_DATA_LENGTH(xfer[i].response);
if (RESP_STATUS(xfer[i].response) != RESP_SUCCESS) {
switch (RESP_STATUS(xfer[i].response)) {
case RESP_SUCCESS:
continue;
case RESP_ERR_ADDR_HEADER:
case RESP_ERR_NACK:
ccc->err = I3C_ERROR_M2;
fallthrough;
default:
ret = -EIO;
goto out;
}